MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 134

MCU 8BIT 16K FLASH 48-QFN

MC9S08JM16CGT

Manufacturer Part Number
MC9S08JM16CGT
Description
MCU 8BIT 16K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM16CGT

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Controller Family/series
HCS08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
48MHz
No. Of Timers
2
Digital Ic Case Style
QFN
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 10 Analog-to-Digital Converter (S08ADC12V1)
10.1.1.2
The ADC module is capable of performing conversions using the MCU bus clock, the bus clock divided
by two, the local asynchronous clock (ADACK) within the module, or the alternate clock (ALTCLK). The
ALTCLK on this device is MCGERCLK.
The selected clock source must run at a frequency such that the ADC conversion clock (ADCK) runs at a
frequency within its specified range (f
determined by the ADIV bits.
ALTCLK is active while the MCU is in wait mode provided the conditions described above are met. This
allows ALTCLK to be used as the conversion clock source for the ADC while the MCU is in wait mode.
ALTCLK cannot be used as the ADC conversion clock source while the MCU is in stop3.
10.1.1.3
The RTC on this device can be enabled as a hardware trigger for the ADC module by setting the
ADCSC2[ADTRG] bit. When enabled, the ADC will be triggered every time RTCINT matches
RTCMOD. The RTC interrupt does not have to be enabled to trigger the ADC.
The RTC can be configured to cause a hardware trigger in MCU run, wait, and stop3.
10.1.1.4
The ADC on MC9S08JM16 series contain only two analog pin enable registers, APCTL1 and APCTL2.
10.1.1.5
The ADC module includes a temperature sensor whose output is connected to one of the ADC analog
channel inputs.
where:
134
1
ADCH
01111
For more information, see
— V
Channel
AD15
TEMP
Alternate Clock
Hardware Trigger
Analog Pin Enables
Temperature Sensor
Selecting the internal bandgap channel requires BGBE =1 in SPMSC1, see
Section 5.7.7, “System Power Management Status and Control 1 Register
(SPMSC1).” For value of bandgap voltage reference see
“Analog Comparator (ACMP)
Equation 10-1
is the voltage of the temperature sensor channel at the ambient temperature.
Section 10.1.1.5, “Temperature
V
Input
Table 10-1. ADC Channel Assignment (continued)
REFL
Temp = 25 – ((V
provides an approximate transfer function of the temperature sensor.
MC9S08JM16 Series Data Sheet, Rev. 2
ADCK
Pin Control
ADPC15
) after being divided down from the ALTCLK input as
TEMP
Electricals.”
NOTE
– V
Sensor.”
TEMP25
ADCH
11111
) ÷ m)
Channel
disabled
module
Appendix A.8,
Input
None
Freescale Semiconductor
Pin Control
Eqn. 10-1
N/A

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