MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 312

• Manufacturer Part Number: MC9S08JM16CGT
• Description: MCU 8BIT 16K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08JM16CGT

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SCI, SPI, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S08JM
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Controller Family/series: HCS08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Digital Ic Case Style: QFN
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Device Controller (S08USBV1)
internal basic virtual component interface (BVCI) compliant target and initiator buses. The BVCI target
interface is used to configure the USB SIE and to provide status and interrupts to CPU. The BVCI initiator
interface provides the integrated DMA controller access to the buffer descriptor table (BDT), and transfers
USB data to or from USB RAM memory.
17.4.1.1.1
The SIE transmitter logic has two primary functions. The first is to format the USB data packets that have
been stored in the endpoint buffers. The second is to transmit data packets via the USB transceiver.
All of the necessary USB data formatting is performed by the SIE transmitter logic, including:
The CPU typically places data in the endpoint buffers as part of the application. When the buffer is
configured as an IN buffer and the USB host requests a packet, the SIE responds with a properly formatted
data packet.
The transmitter logic is also used to generate responses to packets received from the USB host. When a
properly formatted packet is received from the USB host, the transmitter logic responds with the
appropriate ACK, NAK or STALL handshake.
When the SIE transmitter logic is transmitting data from the buffer space for a particular endpoint, CPU
access to that endpoint buffer space is not recommended.
17.4.1.1.2
The SIE receiver logic receives USB data and stores USB packets in USB RAM for processing by the CPU
and the application software. Serial data from the transceiver is converted to a byte-wide parallel data
stream, checked for proper packet framing, and stored in the USB RAM memory.
Received bitstream processing includes the following operations:
The SIE receiver logic provides error detection including:
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NRZI encoding
bit-stuffing
CRC computation
addition of the SYNC field
addition of the End-of-packet (EOP)
decodes an NRZI USB serial data stream
Sync detection
Bit-stuff removal (and error detection)
End-of-packet (EOP) detection
CRC validation
PID check
other USB protocol layer checks.
Bad CRC
Timeout detection for EOP
Serial Interface Engine (SIE) Transmitter Logic
Serial Interface Engine (SIE) Receiver Logic
MC9S08JM16 Series Data Sheet, Rev. 2
Freescale Semiconductor