MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 303

• Manufacturer Part Number: MC9S08JM16CGT
• Description: MCU 8BIT 16K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08JM16CGT

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SCI, SPI, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S08JM
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Controller Family/series: HCS08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Digital Ic Case Style: QFN
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.3.5
The INTSTAT contains bits for each of the interrupt source within the USB module. Each of these bits is
qualified with its respective interrupt enable bits (see the interrupt enable register). All bits of the register
are logically OR'ed together to form a single interrupt source for the microcontroller. Once an interrupt bit
has been set, it may only be cleared by writing a 1 to the respective interrupt bit. This register will contain
the value of 0x00 after a reset.
Freescale Semiconductor
RESUMEF
TOKDNEF
SOFTOKF
REV[7:0]
SLEEPF
STALLF
Reset
Field
Field
8–0
7
5
4
3
2
W
R
STALLF
Interrupt Status Register (INTSTAT)
Revision — Revision number of the USB module.
Stall Flag — The stall interrupt is used in device mode. In device mode the stall flag is asserted when a STALL
handshake is sent by the serial interface engine (SIE).
0 A STALL handshake has not been sent
1 A STALL handshake has been sent
Resume Flag — This bit is set 2.5 μs after clocks to the USB module have restarted following resume signaling.
It can be used to indicate remote wakeup signaling on the USB bus. This interrupt is enabled only when the
USB module is about to enter suspend mode (usually when SLEEPF interrupt detected).
0 No RESUME observed
1 RESUME detected (K-state is observed on the USBDP/USBDN signals for 2.5 μs)
Sleep Flag — This bit is set if the USB module has detected a constant idle on the USB bus for 3 ms, indicating
that the USB module will go into suspend mode. The sleep timer is reset by activity on the USB bus.
0 No constant idle state of 3 ms has been detected on the USB bus
1 A constant idle state of 3 ms has been detected on the USB bus
Token Complete Flag — This bit is set when the current transaction is completed. The firmware must
immediately read the STAT register to determine the endpoint and BD information. Clearing this bit (by setting it
to 1) causes the STAT register to be cleared or the STAT FIFO holding register to be loaded into the STAT register.
0 No tokens being processed are complete
1 Current token being processed is complete
SOF Token Flag — This bit is set if the USB module has received a start of frame (SOF) token.
0 The USB module has not received an SOF token
1 The USB module has received an SOF token
0
7
= Unimplemented or Reserved
0
0
6
Figure 17-8. Interrupt Status Register (INTSTAT)
Table 17-9. INTSTAT Field Descriptions
RESUMEF
MC9S08JM16 Series Data Sheet, Rev. 2
Table 17-7. REV Field Descriptions
0
5
SLEEPF
0
4
Description
Description
TOKDNEF
3
0
Universal Serial Bus Device Controller (S08USBV1)
SOFTOKF
0
2
ERRORF
0
1
USBRSTF
0
0
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