MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 144

MCU 8BIT 16K FLASH 48-QFN

MC9S08JM16CGT

Manufacturer Part Number
MC9S08JM16CGT
Description
MCU 8BIT 16K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM16CGT

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Controller Family/series
HCS08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
48MHz
No. Of Timers
2
Digital Ic Case Style
QFN
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Analog-to-Digital Converter (S08ADC12V1)
10.3.8
The pin control registers disable the I/O port control of MCU pins used as analog inputs. APCTL1 is used
to control the pins associated with channels 0–7 of the ADC module.
144
ADPC7
ADPC6
Field
7
6
Reset:
W
R
Pin Control 1 Register (APCTL1)
ADC Pin Control 7. ADPC7 controls the pin associated with channel AD7.
0 AD7 pin I/O control enabled
1 AD7 pin I/O control disabled
ADC Pin Control 6. ADPC6 controls the pin associated with channel AD6.
0 AD6 pin I/O control enabled
1 AD6 pin I/O control disabled
ADPC7
7
0
ADICLK
MODE
ADIV
00
01
10
11
00
01
10
11
00
01
10
11
ADPC6
Table 10-10. APCTL1 Register Field Descriptions
0
6
Figure 10-10. Pin Control 1 Register (APCTL1)
8-bit conversion (N=8)
12-bit conversion (N=12)
10-bit conversion (N=10)
Reserved
Bus clock
Bus clock divided by 2
Alternate clock (ALTCLK)
Asynchronous clock (ADACK)
MC9S08JM16 Series Data Sheet, Rev. 2
ADPC5
Table 10-7. Clock Divide Select
Table 10-8. Conversion Modes
Table 10-9. Input Clock Select
0
5
Divide Ratio
1
2
4
8
ADPC4
Selected Clock Source
0
4
Mode Description
Description
ADPC3
0
3
Input clock ÷ 2
Input clock ÷ 4
Input clock ÷ 8
Clock Rate
Input clock
ADPC2
0
2
ADPC1
Freescale Semiconductor
0
1
ADPC0
0
0

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