MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 75

MCU 8BIT 16K FLASH 48-QFN

MC9S08JM16CGT

Manufacturer Part Number
MC9S08JM16CGT
Description
MCU 8BIT 16K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM16CGT

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Controller Family/series
HCS08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
48MHz
No. Of Timers
2
Digital Ic Case Style
QFN
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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5.7.8
This register is used to report the status of the low-voltage warning function, and to configure the stop
mode behavior of the MCU. This register must be written during the user’s reset initialization program to
set the desired controls even if the desired settings are the same as the reset settings.
Freescale Semiconductor
Any other Reset:
1
Power-on Reset:
This bit can be written only one time after reset. Additional writes are ignored.
PPDACK
PPDC
LVWV
PPDF
LVD Reset:
LVDV
Field
5
4
3
2
0
System Power Management Status and Control 2 Register
(SPMSC2)
Figure 5-10. System Power Management Status and Control 2 Register (SPMSC2)
W
R
Low-Voltage Detect Voltage Select — This write-once bit selects the low-voltage detect (LVD) trip point
setting. It also selects the warning voltage range. See
Low-Voltage Warning Voltage Select — This bit selects the low-voltage warning (LVW) trip point
voltage.See
Partial Power Down Flag — This read-only status bit indicates that the MCU has recovered from stop2
mode.
0 MCU has not recovered from stop2 mode.
1 MCU recovered from stop2 mode.
Partial Power Down Acknowledge — Writing a 1 to PPDACK clears the PPDF bit.
Partial Power Down Control — This write-once bit controls whether stop2 or stop3 mode is selected.
0 Stop3 mode enabled.
1 Stop2, partial power down, mode enabled.
1
See Electrical Characteristics appendix for minimum and maximum values.
0
0
0
0
7
LVDV:LVWV
Table
0:0
0:1
1:0
1:1
= Unimplemented or Reserved
Table 5-12. LVD and LVW Trip Point Typical Values
Table 5-11. SPMSC2 Register Field Descriptions
5-12.
0
0
0
0
6
MC9S08JM16 Series Data Sheet, Rev. 2
LVDV
0
u
u
5
LVW Trip Point
V
V
V
V
LVW0
LVW1
LVW2
LVW3
= 2.74 V
= 2.92 V
= 4.3 V
= 4.6 V
LVWV
4
0
u
u
Description
Table
Chapter 5 Resets, Interrupts, and System Configuration
PPDF
0
0
0
3
5-12.
LVD Trip Point
V
V
LVD0
LVD1
u = Unaffected by reset
PPDACK
= 2.56 V
= 4.0 V
0
0
0
0
2
1
0
0
0
0
1
PPDC
0
0
0
0
1
75

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