MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 93

• Manufacturer Part Number: MC9S08JM16CGT
• Description: MCU 8BIT 16K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08JM16CGT

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SCI, SPI, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S08JM
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Controller Family/series: HCS08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Digital Ic Case Style: QFN
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.5.12
In addition to the I/O control, port F pins are controlled by the registers listed below.
Freescale Semiconductor
[6:4, 1:0]
[6:4, 1:0]
Reset
Reset
6:4, 1:0
PTFDD
6:4, 1:0
PTFPE
Field
Field
W
W
R
R
Port F Pin Control Registers (PTFPE, PTFSE, PTFDS)
Data Direction for Port F Bits — These read/write bits control the direction of port F pins and what is read for
PTFD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port F bit n and PTFD reads return the contents of PTFDn.
Internal Pullup Enable for Port F Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTF pin. For port F pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port F bit n.
1 Internal pullup device enabled for port F bit n.
0
0
7
7
PTFDD6
PTFPE6
0
0
6
6
Figure 6-29. Internal Pullup Enable for Port F (PTFPE)
Table 6-27. PTFDD Register Field Descriptions
Table 6-28. PTFPE Register Field Descriptions
Figure 6-28. Data Direction for Port F (PTFDD)
PTFDD5
PTFPE5
MC9S08JM16 Series Data Sheet, Rev. 2
0
0
5
5
PTFDD4
PTFPE4
0
0
4
4
Description
Description
3
0
3
0
0
0
2
2
Chapter 6 Parallel Input/Output
PTFDD1
PTFPE1
0
0
1
1
PTFDD0
PTFPE0
0
0
0
0
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