C8051F130-GQR Silicon Laboratories Inc, C8051F130-GQR Datasheet - Page 194

• Manufacturer Part Number: C8051F130-GQR
• Description: IC 8051 MCU 128K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F13xr

Specifications of C8051F130-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: C8051F1x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 8.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F120DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
194
Bits 7–5: UNUSED: Read = 000b; Write = don’t care.
Bits 4–0: PLLM4–0: PLL Reference Clock Pre-divider.
Bits 7–0: PLLN7–0: PLL Multiplier.
PLLN7
R/W
R/W
Bit7
Bit7
-
These bits select the pre-divide value of the PLL reference clock. When set to any non-zero
value, the reference clock will be divided by the value in PLLM4–0. When set to ‘00000b’,
the reference clock will be divided by 32.
These bits select the multiplication factor of the divided PLL reference clock. When set to
any non-zero value, the multiplication factor will be equal to the value in PLLN7-0. When set
to ‘00000000b’, the multiplication factor will be equal to 256.
PLLN6
R/W
R/W
Bit6
Bit6
-
SFR Definition 14.7. PLL0MUL: PLL Clock Scaler
SFR Definition 14.6. PLL0DIV: PLL Pre-divider
PLLN5
R/W
R/W
Bit5
Bit5
-
PLLM4
PLLN4
R/W
R/W
Bit4
Bit4
Rev. 1.4
PLLM3
PLLN3
R/W
R/W
Bit3
Bit3
PLLM2
PLLN2
R/W
R/W
Bit2
Bit2
PLLM1
PLLN1
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
PLLM0
PLLN0
SFR Page:
SFR Page:
R/W
R/W
Bit0
Bit0
0x8D
F
0x8E
F
00000001
00000001
Reset Value
Reset Value