C8051F130-GQR Silicon Laboratories Inc, C8051F130-GQR Datasheet - Page 334

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C8051F130-GQR

Manufacturer Part Number
C8051F130-GQR
Description
IC 8051 MCU 128K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F13xr
Datasheets

Specifications of C8051F130-GQR

Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
C8051F1x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F120DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F130-GQR
Manufacturer:
TI
Quantity:
679
Part Number:
C8051F130-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
24.2.6. 16-Bit Pulse Width Modulator Mode
Each PCA0 module may also be operated in 16-Bit PWM mode. In this mode, the 16-bit capture/compare
module defines the number of PCA0 clocks for the low time of the PWM signal. When the PCA0 counter
matches the module contents, the output on CEXn is asserted high; when the counter overflows, CEXn is
asserted low. To output a varying duty cycle, new value writes should be synchronized with PCA0 CCFn
match interrupts. 16-Bit PWM Mode is enabled by setting the ECOMn, PWMn, and PWM16n bits in the
PCA0CPMn register. For a varying duty cycle, CCFn should also be set to logic 1 to enable match inter-
rupts. The duty cycle for 16-Bit PWM Mode is given by Equation 24.3.
Important Note About Capture/Compare Registers : When writing a 16-bit value to the PCA0 Capture/
Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit
to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’.
334
W
M
P
1
6
n
1
PCA0CPMn
O
M
E
C
n
C
A
P
P
n
0 0 0 0
C
A
P
N
n
M
A
T
n
PCA Timebase
O
G
T
n
W
P
M
n
E
C
C
F
n
0
Enable
Equation 24.3. 16-Bit PWM Duty Cycle
PCA0CPHn
Figure 24.9. PCA 16-Bit PWM Mode
PCA0H
DutyCycle
16-bit Comparator
PCA0CPLn
PCA0L
=
Rev. 1.4
---------------------------------------------------- -
65536 PCA0CPn
Overflow
65536
match
S
R
SET
CLR
Q
Q
CEXn
Crossbar
Port I/O

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