C8051F130-GQR Silicon Laboratories Inc, C8051F130-GQR Datasheet - Page 22

• Manufacturer Part Number: C8051F130-GQR
• Description: IC 8051 MCU 128K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F13xr

Specifications of C8051F130-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: C8051F1x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 8.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F120DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
22
MONEN
VREFA
XTAL1
XTAL2
AIN0.0
AIN0.1
AIN0.2
AIN0.3
AIN0.4
AIN0.5
AIN0.6
AIN0.7
DGND
DGND
DGND
AGND
DAC1
DAC0
VREF
CP0+
CP1+
CP0-
CP1-
VDD
VDD
VDD
TMS
TDO
AV+
TCK
RST
TDI
Analog Power
CP0
Digital Power
A
M
U
X
External Oscillator
Calibrated Internal
Monitor
VDD
Oscillator
CP1
JTAG
Logic
Circuit
(12-Bit)
(12-Bit)
VREF
DAC1
DAC0
SENSOR
TEMP
Circuitry
Prog
Gain
PLL
Boundary Scan
WDT
Debug HW
Figure 1.2. C8051F121/125 Block Diagram
100 ksps
(12-Bit)
System
Clock
ADC
Reset
C
8
0
5
1
o
e
r
External Data
Memory Bus
64x4 byte
256 byte
SFR Bus
FLASH
128 kB
XRAM
cache
RAM
8 kB
Rev. 1.4
Timers 0,
Crossbar
Timer 3/
Port I/O
SPI Bus
Latches
UART0
UART1
SMBus
P0, P1,
Config.
P2, P3
Config.
1, 2, 4
PCA
RTC
Address Bus
Bus Control
Data Bus
ADC
500 ksps
(8-Bit)
C
T
A
D
L
d
d
a
a
r
t
O
C
R
S
S
B
A
R
P4 Latch
P5 Latch
P6 Latch
P7 Latch
AV+
VREFA
Prog
Gain
P0
Drv
P1
Drv
P2
Drv
P3
Drv
A
M
U
X
8:1
DRV
DRV
DRV
DRV
P4
P5
P6
P7
P0.0
P0.7
P1.0/AIN2.0
P1.7/AIN2.7
P2.0
P2.7
P3.0
P3.7