C8051F130-GQR Silicon Laboratories Inc, C8051F130-GQR Datasheet - Page 5

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C8051F130-GQR

Manufacturer Part Number
C8051F130-GQR
Description
IC 8051 MCU 128K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F13xr
Datasheets

Specifications of C8051F130-GQR

Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
C8051F1x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F120DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F130-GQR
Manufacturer:
TI
Quantity:
679
Part Number:
C8051F130-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
13. Reset Sources....................................................................................................... 177
14. Oscillators ............................................................................................................. 185
15. Flash Memory ....................................................................................................... 199
16. Branch Target Cache ........................................................................................... 211
17. External Data Memory Interface and On-Chip XRAM........................................ 219
13.1.Power-on Reset.............................................................................................. 178
13.2.Power-fail Reset ............................................................................................. 178
13.3.External Reset ................................................................................................ 179
13.4.Missing Clock Detector Reset ........................................................................ 179
13.5.Comparator0 Reset ........................................................................................ 179
13.6.External CNVSTR0 Pin Reset ........................................................................ 179
13.7.Watchdog Timer Reset................................................................................... 179
14.1.Internal Calibrated Oscillator .......................................................................... 185
14.2.External Oscillator Drive Circuit...................................................................... 187
14.3.System Clock Selection.................................................................................. 187
14.4.External Crystal Example ............................................................................... 190
14.5.External RC Example ..................................................................................... 190
14.6.External Capacitor Example ........................................................................... 190
14.7.Phase-Locked Loop (PLL).............................................................................. 191
15.1.Programming the Flash Memory .................................................................... 199
15.2.Security Options ............................................................................................. 203
16.1.Cache and Prefetch Operation ....................................................................... 211
16.2.Cache and Prefetch Optimization................................................................... 212
17.1.Accessing XRAM............................................................................................ 219
17.2.Configuring the External Memory Interface .................................................... 219
17.3.Port Selection and Configuration.................................................................... 220
17.4.Multiplexed and Non-multiplexed Selection.................................................... 222
17.5.Memory Mode Selection................................................................................. 224
13.7.1.Enable/Reset WDT ................................................................................ 180
13.7.2.Disable WDT .......................................................................................... 180
13.7.3.Disable WDT Lockout ............................................................................ 180
13.7.4.Setting WDT Interval .............................................................................. 180
14.7.1.PLL Input Clock and Pre-divider ............................................................ 191
14.7.2.PLL Multiplication and Output Clock ...................................................... 191
14.7.3.Powering on and Initializing the PLL ...................................................... 192
15.1.1.Non-volatile Data Storage ...................................................................... 200
15.1.2.Erasing Flash Pages From Software ..................................................... 201
15.1.3.Writing Flash Memory From Software.................................................... 202
15.2.1.Summary of Flash Security Options....................................................... 207
17.1.1.16-Bit MOVX Example ........................................................................... 219
17.1.2.8-Bit MOVX Example ............................................................................. 219
17.4.1.Multiplexed Configuration....................................................................... 222
17.4.2.Non-multiplexed Configuration............................................................... 223
17.5.1.Internal XRAM Only ............................................................................... 224
17.5.2.Split Mode without Bank Select.............................................................. 224
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
5

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