PIC17LC752T-08I/L Microchip Technology, PIC17LC752T-08I/L Datasheet - Page 229

IC MCU OTP 8KX16 A/D 68PLCC

PIC17LC752T-08I/L

Manufacturer Part Number
PIC17LC752T-08I/L
Description
IC MCU OTP 8KX16 A/D 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets

Specifications of PIC17LC752T-08I/L

Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
16KB (8K x 16)
Program Memory Type
OTP
Ram Size
678 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Processor Series
PIC17LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
678 B
Interface Type
I2C, MSSP, RS- 232, SCI, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000, DM173001
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17LC752T-08I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLWT
Example1:
Example 2:
2000 Microchip Technology Inc.
Before Instruction
After Instruction (table write completion)
Before Instruction
After Instruction (table write completion)
Program
Memory
16 bits
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR - 1) =
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
Table Write
TABLWT
TABLWT
15
15
TBLPTR
TBLAT
8
1, 1, REG
0, 0, REG
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
7
0x53
0xAA
0x55
0xA356
0xFFFF
0x53
0x53
0x55
0xA357
0x5355
0x53
0xAA
0x55
0xA356
0xFFFF
0x53
0xAA
0x53
0xA356
0xAA53
0
0
Memory
8 bits
Data
TLRD
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Before Instruction
After Instruction
Program
Memory
16 bits
Decode
t
RAM
TBLAT
RAM
TBLAT
t
RAM
TBLAT
RAM
TBLAT
Q1
=
=
=
=
=
=
=
=
=
=
TBLATH or
Table Latch Read
[ label ] TLRD t,f
0
t
If t = 0,
TBLATL
If t = 1,
TBLATH
None
Read data from 16-bit table latch
(TBLAT) into file register ’f’. Table Latch
is unaffected.
If t = 1; high byte is read
If t = 0; low byte is read
This instruction is used in conjunction
with TABLRD to transfer data from pro-
gram memory to data memory.
1
1
TLRD
TBLATL
register
Read
1010
Q2
0
?
0x00AF
0xAF
0x00AF
1
?
0x00AF
0x00
0x00AF
[0,1]
f
15
15
PIC17C7XX
255
TBLPTR
TBLAT
8
t, RAM
00tx
f;
f
(TBLATH = 0x00)
(TBLATL = 0xAF)
(TBLATH = 0x00)
(TBLATL = 0xAF)
(TBLATH = 0x00)
(TBLATL = 0xAF)
(TBLATH = 0x00)
(TBLATL = 0xAF)
7
Process
Data
Q3
DS30289B-page 229
0
0
ffff
register ’f’
Memory
8 bits
Data
Write
Q4
ffff

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