MC68HC705JP7CDW Freescale Semiconductor, MC68HC705JP7CDW Datasheet - Page 134

• Manufacturer Part Number: MC68HC705JP7CDW
• Description: IC MCU 8BIT 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705JP7CDW

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SIO
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 22
• Program Memory Size: 6KB (6K x 8)
• Program Memory Type: OTP
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Instruction Set
134
JSR opr
JSR opr
JSR opr,X
JSR opr,X
JSR ,X
LDA #opr
LDA opr
LDA opr
LDA opr,X
LDA opr,X
LDA ,X
LDX #opr
LDX opr
LDX opr
LDX opr,X
LDX opr,X
LDX ,X
LSL opr
LSLA
LSLX
LSL opr,X
LSL ,X
LSR opr
LSRA
LSRX
LSR opr,X
LSR ,X
MUL
NEG opr
NEGA
NEGX
NEG opr,X
NEG ,X
NOP
ORA #opr
ORA opr
ORA opr
ORA opr,X
ORA opr,X
ORA ,X
ROL opr
ROLA
ROLX
ROL opr,X
ROL ,X
Source
Form
Jump to Subroutine
Load Accumulator with
Memory Byte
Load Index Register
with Memory Byte
Logical Shift Left
(Same as ASL)
Logical Shift Right
Unsigned Multiply
Negate Byte
(Two’s Complement)
No Operation
Logical OR
Accumulator with
Memory
Rotate Byte Left
through Carry Bit
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Operation
Table 14-6. Instruction Set Summary (Sheet 4 of 6)
PC ← (PC) + n (n = 1, 2, or 3)
Push (PCH); SP ← (SP) – 1
Push (PCL); SP ← (SP) – 1
PC ← Conditional Address
0
C
M ← –(M) = $00 – (M)
M ← –(M) = $00 – (M)
M ← –(M) = $00 – (M)
A ← –(A) = $00 – (A)
X ← –(X) = $00 – (X)
C
X : A ← (X) × (A)
b7
b7
A ← (A) ∨ (M)
Description
b7
A ← (M)
X ← (M)
b0
b0
b0
C
0
— — — — —
— —
— —
— —
— — 0
— —
— — — — —
— —
— —
H
0 — — — 0
on CCR
I
Effect
N Z C
—
—
—
⋅
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