MC68HC705JP7CDW Freescale Semiconductor, MC68HC705JP7CDW Datasheet - Page 30

• Manufacturer Part Number: MC68HC705JP7CDW
• Description: IC MCU 8BIT 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705JP7CDW

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SIO
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 22
• Program Memory Size: 6KB (6K x 8)
• Program Memory Type: OTP
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Central Processor Unit (CPU)
3.3 Index Register
The index register is a general-purpose 8-bit register as shown in
modes, the CPU uses the byte in the index register to determine the conditional address of the operand.
The 8-bit index register can also serve as a temporary data storage location.
3.4 Stack Pointer
The stack pointer is a 16-bit register that contains the address of the next location on the stack as shown
in
to $00FF. The address in the stack pointer decrements as data is pushed onto the stack and increments
as data is pulled from the stack.
The 10 most significant bits of the stack pointer are permanently fixed at 0000000011, so the stack pointer
produces addresses from $00C0 to $00FF. If subroutines and interrupts use more than 64 stack locations,
the stack pointer wraps around to address $00FF and begins writing over the previously stored data. A
subroutine uses two stack locations; an interrupt uses five locations.
3.5 Program Counter
The program counter is a 16-bit register that contains the address of the next instruction or operand to be
fetched as shown in
internally and appear as 111 during stacking and subroutine calls.
Normally, the address in the program counter automatically increments to the next sequential memory
location every time an instruction or operand is fetched. Jump, branch, and interrupt operations load the
program counter with an address other than that of the next sequential location.
30
Figure
3-4. During a reset or after the reset stack pointer (RSP) instruction, the stack pointer initializes
Reset:
Reset:
Read:
Read:
Reset:
Write:
Write:
Read:
Write:
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Figure
Bit
15
Bit
15
0
0
1
0
Bit 7
14
14
0
0
1
0
3-5. The three most significant bits of the program counter are ignored
13
13
0
0
1
0
6
Figure 3-5. Program Counter (PC)
12
12
0
0
Figure 3-4. Stack Pointer (SP)
Figure 3-3. Index Register (X)
11
11
0
0
5
10
10
0
0
Loaded with vector from $1FFE and $1FFF
9
0
0
9
Unaffected by reset
4
8
0
0
8
7
1
1
7
3
6
1
1
6
Figure
5
1
5
2
4
1
4
3-3. In the indexed addressing
3
1
3
1
2
1
2
Freescale Semiconductor
1
1
1
Bit 0
Bit
Bit
0
1
0