MC68HC705JP7CDW Freescale Semiconductor, MC68HC705JP7CDW Datasheet - Page 19

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MC68HC705JP7CDW

Manufacturer Part Number
MC68HC705JP7CDW
Description
IC MCU 8BIT 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705JP7CDW

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SIO
Peripherals
POR, Temp Sensor, WDT
Number Of I /o
22
Program Memory Size
6KB (6K x 8)
Program Memory Type
OTP
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
1.8 IRQ/V
The IRQ/V
function uses the LEVEL bit in the MOR to provide either negative edge-sensitive triggering or both
negative edge-sensitive and low level-sensitive triggering. If the LEVEL bit is set to enable level-sensitive
triggering, the IRQ/V
pin is not used, it must be tied to the V
part of its input to improve noise immunity.
The voltage on this pin may affect operation if the voltage on the IRQ/V
device is released from a reset condition. The IRQ/V
an EPROM memory location or personality EPROM bit. For more information, refer to
and EPROM Programming
1.9 PA0–PA5
These six I/O lines comprise port A, a general-purpose bidirectional I/O port. This port also has four pins
which have keyboard interrupt capability. All six of these pins have high current source and sink capability.
All of these pins have software programmable pulldowns which can be disabled by the SWPDI bit in the
MOR.
1.10 PB0–PB7
These eight I/O lines comprise port B, a general-purpose bidirectional I/O port. This port is also shared
with the 16-bit programmable timer input capture and output compare functions, with the two voltage
comparators in the analog subsystem, and with the simple serial interface (SIOP).
The outputs of voltage comparator 1 can directly drive the PB4 pin; and the PB4 pin has high current
source and sink capability.
All of these pins have software programmable pulldowns which can be disabled by the SWPDI bit in the
MOR.
1.11 PC0–PC7 (MC68HC705JP7)
These eight I/O lines comprise port C, a general-purpose bidirectional I/O port. This port is only available
on the 28-pin MC68HC705JP7. All eight of these pins have high current source and sink capability.
All of these pins have software programmable pulldowns which can be disabled by the SWPDI bit in the
MOR.
Freescale Semiconductor
PP
PP
input pin drives the asynchronous IRQ interrupt function of the CPU. The IRQ interrupt
Each of the PA0–PA3 I/O pins may be connected as an OR function with
the IRQ interrupt function by the PIRQ bit in the MOR. This capability allows
keyboard scan applications where the transitions or levels on the I/O pins
will behave the same as the IRQ/V
levels are inverted. The edge or level sensitivity selected by the LEVEL bit
in the MOR for the IRQ/V
to create the IRQ signal. For more information, refer to
Interrupts.
Pin
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
PP
pin requires an external resistor to V
Characteristics.
DD
PP
supply. The IRQ/V
pin also applies to the I/O pins that are ORed
NOTE
PP
pin, except that active transitions and
PP
pin should only be taken above V
PP
DD
pin contains an internal Schmitt trigger as
for “wired-OR” operation. If the IRQ/V
4.5 External
PP
pin is above V
15.13 PEPROM
DD
DD
when the
to program
IRQ/V
PP
Pin
PP
19

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