MC68HC908BD48IFB Freescale Semiconductor, MC68HC908BD48IFB Datasheet - Page 143

• Manufacturer Part Number: MC68HC908BD48IFB
• Description: IC MCU 48K FLASH 6MHZ USB 44PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908BD48IFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: POR, PWM
• Number Of I /o: 32
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

MC68HC908BD48
Freescale Semiconductor
NOTE:
—
Rev. 2.1
MSxB — Mode Select Bit B
MSxA — Mode Select Bit A
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIM status and control register
(TSC).
ELSxB and ELSxA — Edge/Level Select Bits
This read/write bit selects buffered output compare/PWM operation.
MSxB exists only in the TIM channel 0 status and control register.
Setting MS0B disables the channel 1 status and control register and
reverts TCH1 to general-purpose I/O.
Reset clears the MSxB bit.
When ELSxB:A ≠ 00, this read/write bit selects either input capture
operation or unbuffered output compare/PWM operation.
See
When ELSxB:A = 00, this read/write bit selects the initial output level
of the TCHx pin.
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to an I/O port , and pin TCHx is available as a general-purpose port
I/O pin.
the ELSxB and ELSxA bits.
1 = Buffered output compare/PWM operation enabled
0 = Buffered output compare/PWM operation disabled
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
Table
Table 10-4
Timer Interface Module (TIM)
10-4.
(See Table
shows how ELSxB and ELSxA work. Reset clears
10-4.). Reset clears the MSxA bit.
Timer Interface Module (TIM)
Data Sheet
143