MC68HC908BD48IFB Freescale Semiconductor, MC68HC908BD48IFB Datasheet - Page 221

• Manufacturer Part Number: MC68HC908BD48IFB
• Description: IC MCU 48K FLASH 6MHZ USB 44PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908BD48IFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: POR, PWM
• Number Of I /o: 32
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

16.6.3 Vertical Frequency Registers (VFRs)
MC68HC908BD48
Freescale Semiconductor
—
Rev. 2.1
Address:
Address:
This register pair contains the 13-bit vertical frequency count value, an
overflow bit, and the clamp pulse width selection bits.
VF[12:0] — Vertical Frame Frequency
Reset:
Reset:
Read:
Read:
Write:
Write:
This read-only 13-bit contains information of the vertical frame
frequency. An internal 13-bit counter counts the number of 8µs
periods between two Vsync pulses. The most significant 5 bits of the
counted value is transferred to the high byte register, and the least
significant 8 bits is transferred to an intermediate buffer. When the
high byte register is read, the 8-bit counted value stored in the
intermediate buffer will be uploaded to the low byte register.
Therefore, user program must read the high byte register first, then
low byte register in order to get the complete counted value of one
vertical frame. If the counter overflows, the overflow flag, VOF, will be
set, indicating the counter value stored in the VFRs is meaningless.
The data corresponds to the period of one vertical frame. This register
can be read to determine if the frame frequency is valid, and to
determine the video mode.
$0041
$0042
VOF
Bit 7
Bit 7
VF7
0
0
Figure 16-5. Vertical Frequency High Register
Figure 16-6. Vertical Frequency Low Register
= Unimplemented
CPW1
VF6
Sync Processor
6
0
0
6
0
CPW0
VF5
5
0
0
5
0
VF12
VF4
4
0
4
0
VF11
VF3
3
0
3
0
VF10
VF2
2
0
2
0
VF9
VF1
Sync Processor
1
0
1
0
Data Sheet
Bit 0
Bit 0
VF8
VF0
0
0
221