MC68HC908BD48IFB Freescale Semiconductor, MC68HC908BD48IFB Datasheet - Page 20

• Manufacturer Part Number: MC68HC908BD48IFB
• Description: IC MCU 48K FLASH 6MHZ USB 44PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908BD48IFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: POR, PWM
• Number Of I /o: 32
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

List of Figures
Data Sheet
20
Figure
7-11 Interrupt Status Register 1 (INT1). . . . . . . . . . . . . . . . . . . . . . 103
7-12 Interrupt Status Register 2 (INT2). . . . . . . . . . . . . . . . . . . . . . 103
7-13 Wait Mode Entry Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
7-14 Wait Recovery from Interrupt or Break . . . . . . . . . . . . . . . . . . 106
7-15 Wait Recovery from Internal Reset. . . . . . . . . . . . . . . . . . . . . 106
7-16 Stop Mode Entry Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
7-17 Stop Mode Recovery from Interrupt or Break . . . . . . . . . . . . . 107
7-18 SIM Break Status Register (SBSR) . . . . . . . . . . . . . . . . . . . . 108
7-19 SIM Reset Status Register (SRSR) . . . . . . . . . . . . . . . . . . . . 109
7-20 SIM Break Flag Control Register (SBFCR) . . . . . . . . . . . . . . 110
8-1
9-1
9-2
9-3
9-4
9-5
10-1 TIM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
10-2 PWM Period and Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . 132
10-3 TIM Status and Control Register (TSC) . . . . . . . . . . . . . . . . . 137
10-4 TIM Counter Registers (TCNTH:TCNTL) . . . . . . . . . . . . . . . . 140
10-5 TIM Counter Modulo Registers (TMODH:TMODL). . . . . . . . . 141
10-6 TIM Channel Status and Control Registers (TSC0:TSC1) . . . 142
10-7 CHxMAX Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .145
10-8 TIM Channel Registers (TCH0H/L:TCH1H/L). . . . . . . . . . . . . 146
11-1 PWM Data Registers 0 to 15 (0PWM–15PWM) . . . . . . . . . . . 150
11-2 PWM Control Register 1 and 2 (PWMCR1:PWMCR2). . . . . . 151
11-3 8-Bit PWM Output Waveforms . . . . . . . . . . . . . . . . . . . . . . . . 152
12-1 ADC Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
12-2 ADC Status and Control Register (ADSCR) . . . . . . . . . . . . . . 158
12-3 ADC Data Register (ADR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
12-4 ADC Input Clock Register (ADICLK) . . . . . . . . . . . . . . . . . . . 161
13-1 USB Address Register (UADR) . . . . . . . . . . . . . . . . . . . . . . .166
13-2 USB Interrupt Register (UINTR) . . . . . . . . . . . . . . . . . . . . . . . 166
Oscillator External Connections . . . . . . . . . . . . . . . . . . . . . . .112
Monitor Mode Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Monitor Data Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Sample Monitor Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Read Transaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120
Break Transaction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120
List of Figures
Title
MC68HC908BD48
Freescale Semiconductor
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Rev. 2.1
Page