MC68HC908BD48IFB Freescale Semiconductor, MC68HC908BD48IFB Datasheet - Page 205

• Manufacturer Part Number: MC68HC908BD48IFB
• Description: IC MCU 48K FLASH 6MHZ USB 44PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908BD48IFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: POR, PWM
• Number Of I /o: 32
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

15.6.7 DDC Data Receive Register (DDRR)
MC68HC908BD48
Freescale Semiconductor
—
Rev. 2.1
Address:
If the slave does not return an acknowledge bit (RXAK = 1), the master
will generate a "stop" or "repeated start" condition. The data in the DDTR
will not be transferred to the output circuit. The transmit buffer empty flag
remains cleared (TXBE = 0).
The sequence of events for slave transmit and master transmit are
illustrated in
When the DDC module is enabled, DEN = 1, data in this read-only
register depends on whether module is in master or slave mode.
In slave mode, the data in DDRR is:
In master mode, the data in the DDRR is:
Reset:
Read:
Write:
•
•
•
•
•
the module receives an acknowledge bit (RXAK = 0), after
setting master transmit mode (MRW = 0), and the calling address
has been transmitted; or
the previous data in the output circuit has be transmitted and the
receiving slave returns an acknowledge bit, indicated by a
received acknowledge bit (RXAK = 0).
the calling address from the master when the address match flag
is set (MATCH = 1); or
the last data received when MATCH = 0.
the last data received.
$001B
DRD7
Bit 7
Figure 15-7. DDC Data Receive Register (DDRR)
0
Figure
= Unimplemented
DDC12AB Interface
DRD6
6
0
15-8.
DRD5
5
0
DRD4
4
0
DRD3
3
0
DRD2
2
0
DDC12AB Interface
DRD1
1
0
Data Sheet
DRD0
Bit 0
0
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