MC68HC908BD48IFB Freescale Semiconductor, MC68HC908BD48IFB Datasheet - Page 156

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MC68HC908BD48IFB

Manufacturer Part Number
MC68HC908BD48IFB
Description
IC MCU 48K FLASH 6MHZ USB 44PQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908BD48IFB

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
I²C, USB
Peripherals
POR, PWM
Number Of I /o
32
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 85°C
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908BD48IFB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Analog-to-Digital Converter (ADC)
12.4.2 Voltage Conversion
12.4.3 Conversion Time
12.4.4 Continuous Conversion
Data Sheet
156
NOTE:
or DDR will not have any affect on the port pin that is selected by the
ADC. Read of a port pin which is in use by the ADC will return an
unknown state if the corresponding DDR bit is at logic 0. If the DDR bit
is at logic 1, the value in the port data latch is read.
When the input voltage to the ADC equals
signal to $FF (full scale). If the input voltage equals V
converts it to $00. Input voltage between
straight-line linear conversion. All other input voltages will result in $FF
if greater than
Input voltage should not exceed the analog supply voltages.
Twelve ADC internal clocks are required to perform one conversion. The
ADC starts a conversion on the first rising edge of the ADC internal clock
immediately following a write to the ADSCR. If the ADC internal clock is
selected to run at 1MHz, then one conversion will take 12µs to complete.
With a 1MHz ADC internal clock the maximum sample rate is 83.3kHz.
In the continuous conversion mode, the ADC continuously converts the
selected channel filling the ADC data register with new data after each
conversion. Data from the previous conversion will be overwritten
whether that data has been read or not. Conversions will continue until
the ADCO bit is cleared. The COCO bit (ADC status control register,
$005D) is set after each conversion and can be cleared by writing the
ADC status and control register or reading of the ADC data register.
Number of Bus Cycles = Conversion Time × Bus Frequency
Analog-to-Digital Converter (ADC)
Conversion Time =
------ -
2
3
V
DD
and $00 if less than V
ADC Clock Frequency
12 ADC Clock Cycles
------ -
------ -
2
3
2
3
SS
V
V
DD
DD
.
MC68HC908BD48
, the ADC converts the
and V
Freescale Semiconductor
SS
SS
, the ADC
are a
Rev. 2.1

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