MC68HC908BD48IFB Freescale Semiconductor, MC68HC908BD48IFB Datasheet - Page 61

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MC68HC908BD48IFB

Manufacturer Part Number
MC68HC908BD48IFB
Description
IC MCU 48K FLASH 6MHZ USB 44PQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908BD48IFB

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
I²C, USB
Peripherals
POR, PWM
Number Of I /o
32
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 85°C
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908BD48IFB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
4.8 FLASH Block Protection
4.9 FLASH Block Protect Register (FLBPR)
MC68HC908BD48
Freescale Semiconductor
Rev. 2.1
Address:
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made for protecting
blocks of memory from unintentional erase or program operations due to
system malfunction. This protection is done by use of a FLASH Block
Protect Register (FLBPR). The FLBPR determines the range of the
FLASH memory which is to be protected. The range of the protected
area starts from a location defined by FLBPR and ends at the bottom of
the FLASH memory ($FFFF). When the memory is protected, the HVEN
bit cannot be set in either ERASE or PROGRAM operations.
The FLASH block protect register is implemented as an 7-bit I/O register.
The BPR bit content of the register determines the starting location of the
protected range within the FLASH memory.
BPR[7:1] — FLASH Block Protect Bits
Reset:
Read:
Write:
These seven bits represent bits [15:9] of a 16-bit memory address.
Bits [8:0] are logic 0s.
The resultant 16-bit address is used for specifying the start address
of the FLASH memory for block protection. The FLASH is protected
from this start address to the end of FLASH memory, at $FFFF.
Figure 4-3. FLASH Block Protect Register (FLBPR)
$FE08
BPR7
Bit 7
0
= Unimplemented
BPR6
FLASH Memory
6
0
BPR5
5
0
BPR4
4
0
BPR3
3
0
BPR2
2
0
BPR1
FLASH Memory
1
0
Data Sheet
Bit 0
0
0
61

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