MC68HC908BD48IFB Freescale Semiconductor, MC68HC908BD48IFB Datasheet - Page 169

• Manufacturer Part Number: MC68HC908BD48IFB
• Description: IC MCU 48K FLASH 6MHZ USB 44PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908BD48IFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: POR, PWM
• Number Of I /o: 32
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

13.5.3 USB Interrupt Register 1 (UIR1)
MC68HC908BD48
Freescale Semiconductor
—
Rev. 2.1
Address:
TXD1F — Endpoint 1/2 Data Buffer Transmit Flag
TXD1IE — Transmit Buffer Interrupt Enable
RESUMF — Resume Flag
Reset:
Read:
Write:
The flag is set after the data stored in endpoint 1/2 transmit buffer has
been sent and ACK handshake packet from host is received.
Software must clear this flag by writing a logic 1 to TXD1FR bit after
the data is ready in the transmit buffer to enable the next data packet
transmission when TX1E is enabled. Reset clears this bit.
When this bit is set, the TXD1F flag is enabled to generate an interrupt
request to the CPU. When TXD1IE is cleared, the TXD1F flag is
prevented from generating an interrupt request to the CPU. Reset
clears this bit.
This flag is set if the transaction from idle state to non-idle state is
detected while in suspend mode (SUSPND = 1). An interrupt will be
generated to wake up CPU to indicate a resume signalling from host
and software will clear SUSPND bit and exit from suspend mode.
USB reset signals cannot be detected while in suspend mode until
SUSPND bit is cleared. The RESUMF interrupt service routine is
generated by SE0 to wake up the USB module. This bit can be
cleared by writing "1" to RESUMFR bit. Reset clears this bit.
1 = Transmit on endpoint 1/2 has occurred
0 = Transmit on endpoint 1/2 has not occurred
1 = TXD1F bit set will generate interrupt request to CPU
0 = TXD1F bit set does not generate interrupt request to CPU
1 = USB bus activity detected while in suspend mode
0 = If in suspend mode, no USB bus activity has been detected
TXD1F
$002E
Bit 7
Universal Serial Bus Module (USB)
0
0
Figure 13-3. USB Interrupt Register 1 (UIR1)
TXD1IE
6
0
RESUMF
5
0
0
RESUMFR
4
0
0
TBEFR
Universal Serial Bus Module (USB)
3
0
0
RBFFR
2
0
0
TXD1FR
1
0
0
Data Sheet
EOPFR
Bit 0
0
0
169