DSP56303VL100 Freescale Semiconductor, DSP56303VL100 Datasheet - Page 46

• Manufacturer Part Number: DSP56303VL100
• Description: IC DSP 24BIT 100MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56303VL100

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 196-MAPBGA
• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 24KB
• Program Memory Size: Not RequiredKB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Package: 196MA-BGA
• Maximum Speed: 100 MHz
• Device Million Instructions Per Second: 100 MIPS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Specifications
2.5.5.4 Arbitration Timings
2-26
Notes:
No.
212
213
214
215
216
217
218
219
220
221
222
223
224
CLKOUT high to BR assertion/deassertion
BG asserted/deasserted to CLKOUT high (setup)
CLKOUT high to BG deasserted/asserted (hold)
BB deassertion to CLKOUT high (input set-up)
CLKOUT high to BB assertion (input hold)
CLKOUT high to BB assertion (output)
CLKOUT high to BB deassertion (output)
BB high to BB high impedance (output)
CLKOUT high to address and controls active
CLKOUT high to address and controls high impedance
CLKOUT high to AA active
CLKOUT high to AA deassertion
CLKOUT high to AA high impedance
1.
2.
3.
Synchronous bus arbitration is not recommended. Use Asynchronous mode whenever possible.
An expression is used to compute the maximum or minimum value listed, as appropriate. For timing 223, the minimum is an
absolute value.
T212 is valid for Address Trace mode when the ATE bit in the Operating Mode Register is set. BR is deasserted for internal
accesses and asserted for external accesses.
Characteristics
Table 2-14.
DSP56303 Technical Data, Rev. 11
3
Arbitration Bus Timings
maximum: 0.25 × T
Expression
0.25 × T
0.75 × T
0.25 × T
0.75 × T
C
C
C
C
1
2
C
+ 4.0
Min
0.0
4.0
0.0
4.0
0.0
0.0
0.0
2.5
2.5
2.0
Freescale Semiconductor
—
—
—
100 MHz
Max
4.0
4.0
4.0
4.5
7.5
6.5
7.5
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns