XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 231

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
STEP 2 – Specify the length of this “Path Trace Message” by writing the appropriate value into Bits 3
and 2 (J1 Message Length[1:0]) within the “Transmit STS-3c Path – Transmit J1 Control” Register; as
depicted below.
Transmit STS-3c Path – Transmit J1 Control” Register (Address = 0x19BB)
The relationship between the contents of “J1_Message_Length[1:0]” and the corresponding length of the
“Path Trace Message” is presented below in Table _.
Table _, The Relationship Between the contents of “J1_Message_Length[1:0]” and the corresponding
“Path Trace Message” Length
STEP 3 – Write the value “[0, 1]” into Bits 1 and 0 (J1_Type[1:0]) within the Transmit STS-3c Path –
Transmit J1 Control Register; as depicted below.
Transmit STS-3c Path – Transmit J1 Control” Register (Address = 0x19BB)
This step configures the Transmit STS-3c POH Processor block to use the contents of the “Transmit Path
Trace Message” buffer as the source of the J1 byte, within each “outbound” STS-3c SPE.
2.2.7.3.4.3
The Transmit STS-3c POH Processor block permits the user to specify the contents of the J1 byte within the
“outbound” STS-3c SPE, via software command.
Processor block to support this feature by performing the following steps.
STEP 1 – Write the value “[1, 0]” into Bits 1 and 0 (J1 Type[1:0]) within the “Transmit STS-3c Path –
Transmit J1 Control” Register, as depicted below.
Transmit STS-3c Path – Transmit J1 Control” Register (Address = 0x19BB)
B
B
B
R/O
R/O
R/O
IT
J1_M
IT
IT
0
0
0
7
7
7
ESSAGE
00
01
10
11
Setting and Controlling the “Outbound” J1 Byte via On-Chip Register
_L
B
B
B
R/O
R/O
R/O
IT
ENGTH
IT
IT
0
0
0
6
6
6
Unused
Unused
Unused
[1:0]
B
B
B
R/O
R/O
R/O
IT
IT
IT
0
0
0
5
5
5
B
B
B
R/O
R/O
R/O
IT
IT
IT
0
0
0
4
4
4
231
The user can configure the Transmit STS-3c POH
P
ATH
J1 Message Length[1:0]
J1 Message Length[1:0]
J1 Message Length[1:0]
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
T
X
X
RACE
3
3
3
M
ESSAGE
16
64
64
1
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
X
X
L
2
2
2
ENGTH
(
BYTES
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
)
0
1
1
1
1
J1 Type[1:0]
J1 Type[1:0]
J1 Type[1:0]
XRT94L33
Rev.1.2.0.
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
1
0
0
0
0

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