XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 271

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
2.2.8.3.4.3
The Transmit SONET POH Processor block permits the user to specify the contents of the J1 byte within the
“outbound” STS-1 SPE, via software command.
Processor block to support this feature by performing the following steps.
STEP 1 – Write the value “[1, 0]” into Bits 1 and 0 (J1 Type[1:0]) within the “Transmit SONET Path –
Transmit J1 Control” Register, as depicted below.
Transmit SONET Path – Transmit J1 Control” Register (Address = 0xN9BB)
This step configures the “Transmit SONET POH Processor” block to read out the contents of the “Transmit
Path – Transmit J1 Byte Value” register; and load this value into the “J1 byte-field” within each outbound STS-
1 SPE.
STEP 2 – Write the desired byte value (for the “outbound” J1 byte) into the “Transmit SONET Path –
Transmit J1 Byte Value” register.
The bit-format of this register is presented below.
Transmit SONET Path – Transmitter J1 Value Register (Address = 0xN993)
2.2.8.3.4.4
The Transmit SONET POH Processor block permits the user to source the contents of the J1 byte via the
“TxPOH_n” input port. The user can configure the Transmit SONET POH Processor block to support this
feature by performing the following steps.
STEP 1 – Write the value “[1, 1]” into Bits 1 and 0 (J1 Type[1:0]) within the “Transmit SONET Path –
Transmit J1 Control” Register; as depicted below.
Transmit SONET Path – Transmit J1 Control” Register (Address = 0xN9BB)
This step configures the “Transmit SONET POH Processor” block to accept the value of the J1 byte, via the
“TxPOH_n” input port and load this value into the J1 byte position within each outbound STS-1 SPE.
B
B
B
R/W
R/O
R/O
IT
IT
X
IT
0
0
7
7
7
Setting and Controlling the “Outbound” J1 Byte via On-Chip Register
Setting and Controlling the “Outbound” J1 Byte via External Input pin
B
B
B
R/W
R/O
R/O
IT
IT
IT
X
0
0
6
6
6
Unused
Unused
B
B
B
R/W
R/O
R/O
IT
IT
IT
X
0
0
5
5
5
Transmit_J1_Byte[7:0]
B
B
B
R/W
R/O
R/O
IT
IT
IT
0
X
0
4
4
4
271
The user can configure the Transmit SONET POH
J1 Message Length[1:0]
J1 Message Length[1:0]
B
B
B
R/W
R/W
R/W
IT
X
IT
X
IT
0
3
3
3
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
X
0
2
2
2
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
1
1
1
1
1
J1 Type[1:0]
J1 Type[1:0]
XRT94L33
Rev.1.2.0.
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
0
1
0
0
0