AGLN030V2-ZVQG100 Actel, AGLN030V2-ZVQG100 Datasheet - Page 136

• Manufacturer Part Number: AGLN030V2-ZVQG100
• Description: FPGA - Field Programmable Gate Array 30K System Gates IGLOO nano
• Manufacturer: Actel

Specifications of AGLN030V2-ZVQG100

• Processor Series: AGLN030
• Core: IP Core
• Number Of Macrocells: 256
• Maximum Operating Frequency: 250 MHz
• Number Of Programmable I/os: 77
• Supply Voltage (max): 1.5 V
• Supply Current: 6 uA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 20 C
• Development Tools By Supplier: AGLN-Nano-Kit, AGLN-Z-Nano-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FLASHPRO 4, FlashPro 3, FLASHPRO LITE
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.2 V
• Number Of Gates: 30 K
• Package / Case: VQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Datasheet Information
4- 4
Revision
Revision 3 (cont’d)
Packaging
v0.4
Revision 2 (Dec 2008)
Product Brief Advance
v0.4
Packaging Advance
v0.3
Revision 1 (Nov 2008)
Product Brief Advance
v0.3
Advance
The
The
The second table note in
"AGLN060, AGLN125, and AGLN250 in the CS81 package do not support PLLs.
AGLN030 and smaller devices do not support this feature
The I/Os per package for CS81 were revised to 60 for AGLN060, AGLN125, and
AGLN250 in the
The
The
support for 1.14 V to 1.575 V.
The AGLN030 device was added to product tables and replaces AGL030 entries
that were formerly in the tables.
The
number of I/Os for AGLN060, AGLN125, and AGLN250 from 66 to 64.
The
The table notes and references were revised in
Operating Conditions
stating, "VMV pins must be connected to the corresponding VCCI pins. See Pin
Descriptions for further information." Please review carefully.
VJTAG was added to the list in the table note for
Current (IDD) Characteristics, IGLOO nano Flash*Freeze
added for AGLN010, AGLN015, and AGLN030 for 1.5 V.
VCCI was removed from the list in the table note for
Supply Current (IDD) Characteristics, IGLOO nano Sleep
Values for I
Table 2-12 • Quiescent Supply Current (IDD), No IGLOO nano Flash*Freeze
Mode1.
Values for PAC1 and PAC2 were added to
Contributing to Dynamic Power Consumption in IGLOO nano Devices
2-17 • Different Components Contributing to Dynamic Power Consumption in
IGLOO nano
Table notes regarding wide range support were added to
Maximum and Minimum DC Input and Output
1.2 V LVCMOS wide range values were added to
Maximum and Minimum DC Input Levels
Measuring
The following table note was added to
Characteristics—Software Default Settings
Timing Characteristics—Software Default
macros support LVCMOS 3.3 V wide range, as specified in the JESD8-B
specification."
3.3 V LVCMOS Wide Range and 1.2 V Wide Range were added to
I/O Output Buffer Maximum Resistances 1 andTable 2-30 • I/O Short Currents
IOSH/IOSL.
"81-Pin UC"
"81-Pin CS"
"36-Pin UC"
"Wide Range I/O Support" section
"Advanced I/Os" section
"I/Os Per
Points.
CCA
Devices.
Package"table was updated for the CS81 package to change the
current were updated for AGLN010, AGLN015, and AGLN030 in
"I/Os Per
and
pin table for AGLN250 is new.
pin table is new.
"81-Pin CS"
1. VMV was included with VCCI and a table note was added
Package"table.
"IGLOO nano Devices" table
was updated to include wide power supply voltage
R ev isio n 1 1
pin tables for AGLN020 are new.
Changes
is new.
Table 2-25 • Summary of I/O Timing
Settings: "All LVCMOS 3.3 V software
and
and
Table 2-15 • Different Components
Levels.
Table 2-23 • Summary of AC
Table 2-26 • Summary of I/O
Table 2-9 • Quiescent Supply
Table 2-2 • Recommended
Table 2-22 • Summary of
Table 2-21 • Summary of
."
Table 2-10 • Quiescent
Mode*.
was revised to state,
Mode*. Values were
Table 2-28 •
and
Table
3-4,
Page
2-10,
2-19,
2-23,
3-13
2-11
2-19
2-20
2-21
2-24
3-2
1-8
2-2
2-7
2-8
2-8
IV
II
II
II
I
3-7