LAN9118-MD SMSC, LAN9118-MD Datasheet - Page 54

Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt

LAN9118-MD

Manufacturer Part Number
LAN9118-MD
Description
Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt
Manufacturer
SMSC
Type
Single Chip MAC and PHYr
Datasheet

Specifications of LAN9118-MD

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Revision 1.5 (07-11-08)
3.13.1.1
3.13.1.2
3.13.2
Receive Data FIFO Fast Forward
The RX data path implements an automatic data discard function. Using the RX data FIFO Fast
Forward bit (RX_FFWD) in the RX_DP_CTRL register, the host can instruct the LAN9118 to skip the
packet at the head of the RX data FIFO. The RX data FIFO pointers are automatically incremented to
the beginning of the next RX packet.
When performing a fast-forward, there must be at least 4 DWORDs of data in the RX data FIFO for
the packet being discarded. For less than 4 DWORDs do not use RX_FFWD. In this case data must
be read from the RX data FIFO and discarded using standard PIO read operations.
After initiating a fast-forward operation, do not perform any reads of the RX data FIFO until the
RX_FFWD bit is cleared. Other resources can be accessed during this time (i.e., any registers and/or
the other three FIFOs). Also note that the RX_FFWD will only fast-forward the RX data FIFO, not the
RX status FIFO.
The receiver does not have to be stopped to perform a fast-forward operation.
Force Receiver Discard (Receiver Dump)
In addition to the Receive data Fast Forward feature, LAN9118 also implements a receiver "dump"
feature. This feature allows the host processor to flush the entire contents of the RX data and RX
status FIFOs. When activated, the read and write pointers for the RX data and status FIFOs will be
returned to their reset state. To perform a receiver dump, the LAN9118 receiver must be halted. Once
the receiver stop completion is confirmed, the RX_DUMP bit can be set in the RX_CFG register. The
RX_DUMP bit is cleared when the dump is complete. For more information on stopping the receiver,
please refer to
on the RX_DUMP bit, please refer to
page
RX Packet Format
The RX status words can be read from the RX status FIFO port, while the RX data packets can be
read from the RX data FIFO. RX data packets are formatted in a specific manner before the host can
read them. It is assumed that the host has previously read the associated status word from the RX
status FIFO, to ascertain the data size and any error conditions.
75.
Section 3.13.4, "Stopping and Starting the Receiver," on page
DATASHEET
Section 5.3.7, "RX_CFG—Receive Configuration Register," on
54
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
56. For more information
SMSC LAN9118
Datasheet

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