LAN9118-MD SMSC, LAN9118-MD Datasheet - Page 79

Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt

LAN9118-MD

Manufacturer Part Number
LAN9118-MD
Description
Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt
Manufacturer
SMSC
Type
Single Chip MAC and PHYr
Datasheet

Specifications of LAN9118-MD

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9118
As space in the TX MIL (Mac Interface Layer) FIFO frees, data is moved into it from the TX data FIFO.
Depending on the size of the frames to be transmitted, the MIL can hold up to two Ethernet frames.
This is in addition to any TX data that may be queued in the TX data FIFO.
Conversely, as data is received by the LAN9118, it is moved from the MAC to the RX MIL FIFO, and
then into the RX data FIFO. When the RX data FIFO fills up, data will continue to collect in the RX
MIL FIFO. If the RX MIL FIFO fills up and overruns, subsequent RX frames will be lost until room is
made in the RX data FIFO. For each frame of data that is lost, the RX Dropped Frames Counter
(RX_DROP) is incremented.
RX and TX MIL FIFO levels are not visible to the host processor. RX and TX MIL FIFOs operate
independent of the TX adatand RX data and status FIFOs. FIFO levels set for the RX and TX data
and Status FIFOs do not take into consideration the MIL FIFOs.
DATASHEET
79
Revision 1.5 (07-11-08)

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