LAN9118-MD SMSC, LAN9118-MD Datasheet - Page 88

Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt

LAN9118-MD

Manufacturer Part Number
LAN9118-MD
Description
Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt
Manufacturer
SMSC
Type
Single Chip MAC and PHYr
Datasheet

Specifications of LAN9118-MD

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Revision 1.5 (07-11-08)
5.3.20
5.3.21
BITS
BITS
29-8
31-0
7-0
31
30
DESCRIPTION
CSR Busy. When a 1 is written into this bit, the read or write operation is
performed to the specified MAC CSR. This bit will remain set until the
operation is complete. In the case of a read this means that the host can
read valid data from the data register. The MAC_CSR_CMD and
MAC_CSR_DATA registers should not be modified until this bit is cleared.
R/nW. When set, this bit indicates that the host is requesting a read
operation. When clear, the host is performing a write.
Reserved.
CSR Address. The 8-bit value in this field selects which MAC CSR will be
accessed with the read or write operation.
DESCRIPTION
MAC CSR Data. Value read from or written to the MAC CSR’s.
MAC_CSR_CMD – MAC CSR Synchronizer Command Register
This register is used to control the read and write operations with the MAC CSR’s
MAC_CSR_DATA – MAC CSR Synchronizer Data Register
This register is used in conjunction with the MAC_CSR_CMD register to perform read and write
operations with the MAC CSR’s
Offset:
Offset:
A4h
A8h
DATASHEET
88
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Size:
Size:
32 bits
32 bits
TYPE
TYPE
R/W
R/W
R/W
RO
SC
SMSC LAN9118
00000000h
DEFAULT
DEFAULT
00h
Datasheet
0
0
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