LAN9118-MD SMSC, LAN9118-MD Datasheet - Page 72

• Manufacturer Part Number: LAN9118-MD
• Description: Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt
• Manufacturer: SMSC
• Type: Single Chip MAC and PHYr

Specifications of LAN9118-MD

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.5 (07-11-08)
12-11
BITS
2-0
10
9
8
7
6
5
4
3
Reserved
TX Data FIFO Overrun Interrupt (TDFO). Generated when the TX data
FIFO is full, and another write is attempted.
TX Data FIFO Available Interrupt (TDFA). Generated when the TX data
FIFO available space is greater than the programmed level.
TX Status FIFO Full Interrupt (TSFF). Generated when the TX Status
FIFO is full.
TX Status FIFO Level Interrupt (TSFL). Generated when the TX Status
FIFO reaches the programmed level.
RX Dropped Frame Interrupt (RXDF_INT). This interrupt is issued
whenever a receive frame is dropped.
Reserved
RX Status FIFO Full Interrupt (RSFF). Generated when the RX Status
FIFO is full.
RX Status FIFO Level Interrupt (RSFL). Generated when the RX Status
FIFO reaches the programmed level.
GPIO [2:0] (GPIOx_INT). Interrupts are generated from the GPIO’s.
These interrupts are configured through the GPIO_CFG register.
DESCRIPTION
DATASHEET
72
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
R/WC
R/WC
R/WC
R/WC
R/WC
R/WC
R/WC
R/WC
TYPE
RO
RO
SMSC LAN9118
DEFAULT
Datasheet
000
0
0
0
0
0
0
0
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-