LAN9118-MD SMSC, LAN9118-MD Datasheet - Page 80

Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt

LAN9118-MD

Manufacturer Part Number
LAN9118-MD
Description
Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt
Manufacturer
SMSC
Type
Single Chip MAC and PHYr
Datasheet

Specifications of LAN9118-MD

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Revision 1.5 (07-11-08)
5.3.10
5.3.11
31-24
23-16
BITS
BITS
30-0
15-0
31
DESCRIPTION
RX Data FIFO Fast Forward (RX_FFWD): Writing a ‘1’ to this bit causes
the RX data FIFO to fast-forward to the start of the next frame. This bit will
remain high until the RX data FIFO fast-forward operation has completed.
No reads should be issued to the RX data FIFO while this bit is high.
Note:
Reserved
DESCRIPTION
Reserved
RX Status FIFO Used Space (RXSUSED). Indicates the amount of space
in DWORDs, used in the RX Status FIFO.
RX Data FIFO Used Space (RXDUSED).). Reads the amount of space in
bytes, used in the RX data FIFO. For each receive frame, this field is
incremented by the length of the receive data rounded up to the nearest
DWORD (if the payload does not end on a DWORD boundary).
RX_DP_CTRL—Receive Datapath Control Register
This register is used to discard unwanted receive frames.
RX_FIFO_INF—Receive FIFO Information Register
This register contains the used space in the receive FIFOs of the LAN9118 Ethernet Controller.
Offset:
Offset:
Please refer to section “Receive Data FIFO Fast Forward” on
page 54 for detailed information regarding the use of RX_FFWD.
78h
7Ch
DATASHEET
80
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Size:
Size:
32 bits
32 bits
TYPE
TYPE
R/W
RO
RO
RO
RO
SMSC LAN9118
DEFAULT
DEFAULT
0000h
00h
Datasheet
0h
-
-

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