LAN9118-MD SMSC, LAN9118-MD Datasheet - Page 69

Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt

LAN9118-MD

Manufacturer Part Number
LAN9118-MD
Description
Ethernet ICs HiPerfrm Sngl-Chip 10/100 Ethrnt
Manufacturer
SMSC
Type
Single Chip MAC and PHYr
Datasheet

Specifications of LAN9118-MD

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9118
5.3.1
BASE ADDRESS
31-16
BITS
15-0
+ OFFSET
B8h - FCh
ACh
9Ch
A0h
A4h
A8h
B0h
B4h
DESCRIPTION
Chip ID. This read-only field identifies this design
Chip Revision. This is the current revision of the chip.
ID_REV—Chip ID and Revision
This register contains the ID and Revision fields for this design.
Offset:
Table 5.1 LAN9118 Direct Address Register Map (continued)
MAC_CSR_DATA
MAC_CSR_CMD
RESERVED
FREE_RUN
E2P_DATA
RX_DROP
AFC_CFG
E2P_CMD
SYMBOL
CONTROL AND STATUS REGISTERS
50h
DATASHEET
Free Run Counter
RX Dropped Frames Counter
MAC CSR Synchronizer Command (MAC
CSR’s are indexed through this register)
MAC CSR Synchronizer Data
Automatic Flow Control Configuration
EEPROM command (The EEPROM is
indexed through this register)
EEPROM Data
Reserved for future use
69
REGISTER NAME
Size:
32 bits
TYPE
RO
RO
Revision 1.5 (07-11-08)
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
DEFAULT
DEFAULT
0001h
0118h
-
-

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