MT41J256M8HX-15E:D Micron Technology Inc, MT41J256M8HX-15E:D Datasheet - Page 47

• Manufacturer Part Number: MT41J256M8HX-15E:D
• Description: MICMT41J256M8HX-15E:D 2GB:X4,X8,X16 DDR3
• Manufacturer: Micron Technology Inc
• Type: DDR3 SDRAMr
• Series: -r

Specifications of MT41J256M8HX-15E:D

• Organization: 256Mx8
• Address Bus: 18b
• Maximum Clock Rate: 1.333GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 165mA
• Pin Count: 78
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Format - Memory: RAM
• Memory Type: DDR3 SDRAM
• Memory Size: 2G (256M x 8)
• Speed: 667MHz
• Interface: Parallel
• Voltage - Supply: 1.425 V ~ 1.575 V
• Operating Temperature: 0°C ~ 95°C
• Package / Case: 78-TFBGA
• Lead Free Status / RoHS Status: Compliant

Table 22: I
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
DD
DD0
DD1
DD2P0(SLOW)
DD2P1(FAST)
DD2Q
DD2N
DD2NT
DD3P
DD3N
DD4R
DD4W
DD5B
DD6
DD6ET
DD7
DD8
Speed Bin
DD
Width
Maximum Limits – Die Rev H
All
All
All
All
All
All
All
All
All
All
All
x4
x8
x4
x8
x4
x8
x4
x8
x4
x8
Notes:
DDR3-1066
1. T
2. Enabling ASR could increase I
3. Restricted to T
4. T
5. The I
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of the range 0°C ≤ T
5a. When TC < 0°C: I
rated by 2%; and I
5b. When TC > +85°C: I
must be derated by 2%; I
C
C
= +85°C; SRT and ASR are disabled.
= +85°C; ASR and ODT are disabled; SRT is enabled.
DD
values must be derated (increased) on IT-option devices when operated outside
DDR3-1333
C
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(MAX) = +85°C.
DD6
C
DD2P
≤ +85°C:
and I
DD0
Electrical Characteristics – I
DD2Px
and I
47
, I
DD7
DD1
DD
DD3P
must be derated by 30%; and I
DDR3-1600
must be derated by 7%.
, I
x by up to an additional 2mA.
DD2N
must be derated by 4%; I
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
, I
DD2NT
, I
2Gb: x4, x8, x16 DDR3 SDRAM
DD2Q
DDR3-1866
, I
DD3N
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
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tbd
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tbd
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, I
DD3P
DD4R
DD6
© 2006 Micron Technology, Inc. All rights reserved.
, I
DD
must be derated by 80%.
DD4R
and I
Specifications
Units
, I
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
DD5W
DD4W
must be de-
, and I
Notes
1, 2, 3
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
2, 4
1, 2
1, 2
1, 2
DD5W