MT41J256M8HX-15E:D Micron Technology Inc, MT41J256M8HX-15E:D Datasheet - Page 54

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MT41J256M8HX-15E:D

Manufacturer Part Number
MT41J256M8HX-15E:D
Description
MICMT41J256M8HX-15E:D 2GB:X4,X8,X16 DDR3
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Series
-r
Datasheets

Specifications of MT41J256M8HX-15E:D

Organization
256Mx8
Address Bus
18b
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
165mA
Pin Count
78
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
2G (256M x 8)
Speed
667MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
78-TFBGA
Lead Free Status / RoHS Status
Compliant

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Slew Rate Definitions for Single-Ended Input Signals
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
Note:
Table 29: Allowed Time Before Ringback (
DQS# (Continued)
Setup (
tween the last crossing of V
nominal slew rate for a falling signal is defined as the slew rate between the last crossing
of V
Hold (
tween the last crossing of V
nominal slew rate for a falling signal is defined as the slew rate between the last crossing
of V
Table 30: Single-Ended Input Slew Rate Definition
1. Below V
Input
Input Slew Rates
Setup
Hold
REF
IH(DC)min
(Linear Signals)
Slew Rate (V/ns)
t
IH and
t
and the first crossing of V
IS and
<1.0
IL(AC)
and the first crossing of V
1.4
1.2
1.0
t
t
DH) nominal slew rate for a rising signal is defined as the slew rate be-
DS) nominal slew rate for a rising signal is defined as the slew rate be-
Falling
Falling
Rising
Rising
Edge
REF
IL(DC)max
V
V
IL(DC)max
IH(DC)min
From
54
V
V
and the first crossing of V
REF
REF
IL(AC)max
Measured
and the first crossing of V
Electrical Specifications – DC and AC
REF
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
DVAC (ps) at |V
350mV
.
(see Figure 20 (page 55)).
22
13
V
V
0
0
IH(AC)min
IL(AC)max
V
V
To
2Gb: x4, x8, x16 DDR3 SDRAM
REF
REF
t
DVAC) for CK - CK# and DQS -
IH,diff(AC)
IH(AC)min
REF
© 2006 Micron Technology, Inc. All rights reserved.
. Setup (
. Hold (
V
V
V
V
to V
IH(AC)min
REF
REF
IH(DC)min
Calculation
ΔTRSH
- V
- V
IL,diff(AC)
ΔTRS
ΔTFH
ΔTFS
300mV
IL(AC)max
IL(DC)max
159
155
150
150
t
IH and
t
IS and
- V
- V
REF
REF
|
t
t
DH)
DS)

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