MT41J256M8HX-15E:D Micron Technology Inc, MT41J256M8HX-15E:D Datasheet - Page 52

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MT41J256M8HX-15E:D

Manufacturer Part Number
MT41J256M8HX-15E:D
Description
MICMT41J256M8HX-15E:D 2GB:X4,X8,X16 DDR3
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Series
-r
Datasheets

Specifications of MT41J256M8HX-15E:D

Organization
256Mx8
Address Bus
18b
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
165mA
Pin Count
78
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
2G (256M x 8)
Speed
667MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
78-TFBGA
Lead Free Status / RoHS Status
Compliant

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Table 28: Differential Input Operating Conditions (CK, CK# and DQS, DQS#)
Figure 17: V
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
Parameter/Condition
Differential input voltage logic high - slew
Differential input voltage logic low - slew
Differential input voltage logic high
Differential input voltage logic low
Differential input crossing voltage relative
to V
Differential input crossing voltage relative
to V
Single-ended high level for strobes
Single-ended high level for CK, CK#
Single-ended low level for strobes
Single-ended low level for CK, CK#
DD
DD
/2 for DQS, DQS#; CK, CK#
/2 for CK, CK#
IX
for Differential Signals
Notes:
V
DD
V
CK#, DQS#
1. Clock is referenced to V
2. Reference is V
3. Differential input slew rate = 2 V/ns
4. Defines slew rate reference points, relative to input crossing voltages.
5. Maximum limit is relative to single-ended signals; overshoot specifications are applicable.
6. Minimum limit is relative to single-ended signals; undershoot specifications are applicable.
7. The typical value of V
8. The V
9. V
DD
/2, V
V
, V
CK, DQS
SS
and V
differential input signals must cross.
is only allowed when the following conditions are met: The single-ended input signals
are monotonic, have the single-ended swing V
the differential slew rate of CK, CK# is greater than 3 V/ns.
DDQ
, V
DDQ
IX
SSQ
/2
must provide 25mV (single-ended) of the voltages separation.
IX(AC)
IX
extended range (±175mV) is allowed only for the clock; this V
is expected to track variations in V
X X
V
V
IH,diff(AC)SLEW
IL,diff(AC)SLEW
V
V
REFCA(DC)
V
Symbol
IH,diff(AC)
IL,diff(AC)
IX
V
V
V
(175)
SEH
SEL
IX
IX(AC)
V
IX
for clock and for V
DD
52
and V
is expected to be about 0.5 × V
X X
2 × (V
V
V
V
V
SS
DDQ
REF(DC)
REF(DC)
DD
. Data strobe is referenced to V
V
Electrical Specifications – DC and AC
IH(AC)
+200
SS
Min
/2 + 175
V
Micron Technology, Inc. reserves the right to change products or specifications without notice.
n/a
V
/2 + 175
/V
SSQ
SS
SSQ
- 150
- 175
- V
REFDQ(DC)
REF
X X
2Gb: x4, x8, x16 DDR3 SDRAM
DD
)
SEL
. V
, V
for strobe.
IX(AC)
SEH
2 × (V
V
V
V
V
IX
V
REF(DC)
REF(DC)
of at least V
DDQ
V
indicates the voltage at which
DD
DD
REF
V
Max
–200
DD
V
/2 - 175
n/a
X X
DDQ
/2 - 175
/V
DD
© 2006 Micron Technology, Inc. All rights reserved.
of the transmitting device,
- V
DDQ
+ 150
+ 175
IL(AC)
DDQ
DD
)
and V
IX
/2 ±250mV, and
extended range
Units
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
SSQ
CK#, DQS#
V
CK, DQS
.
DD
V
V
V
V
DD
IX
/2, V
IX
SS
, V
Notes
7, 8, 4
, V
7, 4
DDQ
SSQ
DDQ
4
4
5
6
5
5
6
6
/2

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