PSD813F2-A-70J STMicroelectronics, PSD813F2-A-70J Datasheet - Page 101

• Manufacturer Part Number: PSD813F2-A-70J
• Manufacturer: STMicroelectronics

Specifications of PSD813F2-A-70J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PLCC
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

PSD8XXFX
Table 49.
1. Fast Slew Rate output available on PA3-PA0, PB3-PB0, and PD2-PD0. Decrement times by given amount.
Table 50.
t
t
f
t
t
t
t
t
Symbol
Symbol
ARPW
ARD
MAX
S
H
CH
CL
CO
CPLD register clear
or preset pulse width
CPLD array delay
Maximum
frequency
External
feedback
Maximum
frequency
Internal
feedback (f
Maximum
frequency
Pipelined data
Input setup time
Input hold time
Clock high time
Clock low time
Clock to output
delay
Parameter
CPLD combinatorial timing (3 V devices) (continued)
Figure 40. Synchronous clock mode timing – PLD
CPLD macrocell Synchronous clock mode timing (5 V devices)
Parameter
CNT
)
REGISTERED
1/(t
Conditions
Clock input
Clock input
Clock input
1/(t
1/(t
OUTPUT
S
CLKIN
INPUT
+t
CH
S
Conditions
+t
CO
macrocell
+t
CO
–10)
CL
Any
)
)
Min
12
0
6
6
Doc ID 7833 Rev 7
-70
Min Max Min Max Min Max
25
Max
40.0
66.6
83.3
13
t CH
-12
25
Min
15
10
10
0
30
-90
30.30
43.48
50.00
Max
-15
18
t CL
29
Min
20
15
15
t S
0
35
-15
-20
25.00
31.25
35.71
t H
Max
22
33
t CO
Aloc
Aloc
Fast
+ 4
+ 2
PT
PT
AC/DC parameters
Turbo
Turbo
+ 20
+ 10
AI02860
off
off
Slew
Slew
rate
rate
– 2
(1)
(1)
101/128
MHz
MHz
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns