PSD813F2-A-70J STMicroelectronics, PSD813F2-A-70J Datasheet - Page 81

• Manufacturer Part Number: PSD813F2-A-70J
• Manufacturer: STMicroelectronics

Specifications of PSD813F2-A-70J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PLCC
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

PSD8XXFX
Figure 31. APD unit
Table 30.
1. Power-down does not affect the operation of the PLD. The PLD operation in this mode is based only on the Turbo Bit.
2. Typical current consumption assuming no PLD inputs are changing state and the PLD Turbo Bit is ’0.’
17.2
17.3
Power-down
Mode
APD EN
PMMR0 BIT 1=1
ALE
RESET
CSI
CLKIN
PSD timing and standby current during Power-down mode
For users of the HC11 (or compatible)
The HC11 turns off its E clock when it sleeps. Therefore, if you are using an HC11 (or
compatible) in your design, and you wish to use the Power-down mode, you must not
connect the E clock to CLKIN (PD1). You should instead connect a crystal oscillator to
CLKIN (PD1). The crystal oscillator frequency must be less than 15 times the frequency of
AS. The reason for this is that if the frequency is greater than 15 times the frequency of AS,
the PSD keeps going into Power-down mode.
Other power saving options
The PSD offers other reduced power saving options that are independent of the Power-
down mode. Except for PSD Chip Select input (CSI, PD2) features, they are enabled by
setting bits in PMMR0 and PMMR2.
PLD propagation delay
Normal t
DISABLE
FLASH/EEPROM/SRAM
TRANSITION
DETECTION
DETECT
EDGE
PD
(1)
access time
No access
Memory
Doc ID 7833 Rev 7
CLR
COUNTER
APD
PD
PD
Access recovery time
to normal access
DISABLE BUS
INTERFACE
t
LVDV
PLD
EEPROM SELECT
FLASH SELECT
SRAM SELECT
POWER DOWN
( PDN )
SELECT
Typical standby current
5 V V
75 µA
Power management
CC
(2)
3 V V
25 µA
AI02891
81/128
CC
(2)