PSD813F2-A-70J STMicroelectronics, PSD813F2-A-70J Datasheet - Page 11

• Manufacturer Part Number: PSD813F2-A-70J
• Manufacturer: STMicroelectronics

Specifications of PSD813F2-A-70J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PLCC
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

PSD8XXFX
1
Table 2.
PSD813F2
PSD813F4
PSD813F5
PSD833F2
PSD834F2
Part number
Summary description
The PSD8XXFX family of memory systems for microcontrollers (MCUs) brings in-system-
programmability (ISP) to Flash memory and programmable logic. The result is a simple and
flexible solution for embedded designs. PSD devices combine many of the peripheral
functions found in MCU based applications.
Table 2
The CPLD in the PSD devices features an optimized macrocell logic architecture. The PSD
macrocell was created to address the unique requirements of embedded system designs. It
allows direct connection between the system address/data bus, and the internal PSD
registers, to simplify communication between the MCU and other supporting devices.
The PSD device includes a JTAG serial programming interface, to allow in-system
programming (ISP) of the entire device. This feature reduces development time, simplifies
the manufacturing flow, and dramatically lowers the cost of field upgrades. Using ST’s
special Fast-JTAG programming, a design can be rapidly programmed into the PSD in as
little as seven seconds.
The innovative PSD8XXFX family solves key problems faced by designers when managing
discrete Flash memory devices, such as:
●
●
●
The JTAG Serial Interface block allows in-system programming (ISP), and eliminates the
need for an external Boot EPROM, or an external programmer. To simplify Flash memory
updates, program execution is performed from a secondary Flash memory while the primary
Flash memory is being updated. This solution avoids the complicated hardware and
software overhead necessary to implement IAP.
ST makes available a software development tool, PSDsoft™ Express, that generates ANSI-
C compliant code for use with your target MCU. This code allows you to manipulate the non-
volatile memory (NVM) within the PSD. Code examples are also provided for:
●
●
●
Product range
(1)
Primary Flash
First-time in-system programming (ISP)
Complex address decoding
Simultaneous read and write to the device.
Flash memory IAP via the UART of the host MCU
Memory paging to execute code across several PSD memory pages
Loading, reading, and manipulation of PSD macrocells by the MCU.
(8 sectors)
memory
summarizes all the devices.
1 Mbit
1 Mbit
1 Mbit
1 Mbit
2 Mbit
Flash memory
Secondary
(4 sectors)
256 Kbit
256 Kbit
256 Kbit
256 Kbit
none
Doc ID 7833 Rev 7
16 Kbit
64 Kbit
64 Kbit
SRAM
none
none
ports
I/O
27
27
27
27
27
Input
24
24
24
24
24
macrocells
Number of
Output
16
16
16
16
16
Summary description
Serial ISP
JTAG/ISC
port
yes
yes
yes
yes
yes
Turbo
mode
11/128
yes
yes
yes
yes
yes