PSD813F2-A-70J STMicroelectronics, PSD813F2-A-70J Datasheet - Page 90

• Manufacturer Part Number: PSD813F2-A-70J
• Manufacturer: STMicroelectronics

Specifications of PSD813F2-A-70J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PLCC
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

Initial delivery state
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Initial delivery state
When delivered from ST, the PSD device has all bits in the memory and PLDs set to ’1.’ The
PSD Configuration register bits are set to ’0.’ The code, configuration, and PLD logic are
loaded using the programming procedure. Information for programming the device is
available directly from ST. Please contact your local sales representative.
Table 36.
1. The state of Reset (RESET) does not interrupt (or prevent) JTAG operations if the JTAG signals are
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit
dedicated by an NVM Configuration bit (via PSDsoft Express). However, Reset (RESET) prevents or
interrupts JTAG operations if the JTAG enable register is used to enable the JTAG signals.
JTAG_Enable
Name
JTAG Enable register
X
X
X
X
X
X
X
0 =
1 =
off
on
0
0
0
0
0
0
0
JTAG port is disabled.
JTAG port is enabled.
Not used, and should be set to zero.
Not used, and should be set to zero.
Not used, and should be set to zero.
Not used, and should be set to zero.
Not used, and should be set to zero.
Not used, and should be set to zero.
Not used, and should be set to zero.
Doc ID 7833 Rev 7
(1)
Description
PSD8XXFX