MT41J256M8DA-125:H Micron Technology Inc, MT41J256M8DA-125:H Datasheet - Page 102

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MT41J256M8DA-125:H

Manufacturer Part Number
MT41J256M8DA-125:H
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT41J256M8DA-125:H

Lead Free Status / Rohs Status
Supplier Unconfirmed
Figure 34: Nominal Slew Rate for
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
V
V
V
V
IH(AC)min
IH(DC)min
IL(DC)max
IL(AC)max
V
REF(DC)
DQS#
V
DQS
CK#
DDQ
Note:
V
CK
SS
Hold slew rate
rising signal
1. Both the clock and the strobe are drawn on different time scales.
DC to V
region
=
REF
t
IH (Command and Address – Clock)
V
REF(DC)
slew rate
Nominal
t IS
Command and Address Setup, Hold, and Derating
ΔTR
- V
IL(DC)max
t IH
102
ΔTR
Hold slew rate
falling signal
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2Gb: x4, x8, x16 DDR3 SDRAM
DC to V
slew rate
Nominal
region
t IS
=
REF
V
IH(DC)min
t IH
ΔTF
© 2006 Micron Technology, Inc. All rights reserved.
- V
ΔTF
REF(DC)

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