MT41J256M8DA-125:H Micron Technology Inc, MT41J256M8DA-125:H Datasheet - Page 37

• Manufacturer Part Number: MT41J256M8DA-125:H
• Manufacturer: Micron Technology Inc

Specifications of MT41J256M8DA-125:H

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 15: I
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
DD4R
0
1
2
3
4
5
6
7
Measurement Loop
16–23
24–31
32–39
40–47
48–55
56–63
8–15
Notes:
0
1
2
3
4
5
6
7
1. DQ, DQS, DQS# are midlevel when not driving in burst sequence.
2. DM is LOW.
3. Burst sequence is driven on each DQ signal by the RD command.
4. All banks open.
Electrical Specifications – I
RD
RD
D#
D#
D#
D#
D
D
0
1
1
1
0
1
1
1
1
0
1
1
1
0
1
1
0
0
1
1
0
0
1
1
Repeat sub-loop 0, use BA[2:0] = 1
Repeat sub-loop 0, use BA[2:0] = 2
Repeat sub-loop 0, use BA[2:0] = 3
Repeat sub-loop 0, use BA[2:0] = 4
Repeat sub-loop 0, use BA[2:0] = 5
Repeat sub-loop 0, use BA[2:0] = 6
Repeat sub-loop 0, use BA[2:0] = 7
37
1
0
1
1
1
0
1
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
0
0
0
0
0
0
0
0
DD
0
0
0
0
0
0
0
0
Specifications and Conditions
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
© 2006 Micron Technology, Inc. All rights reserved.
0
0
0
0
F
F
F
F
0
0
0
0
0
0
0
0
Definitions
00000000
00110011
–
–
–
–
–
–