MT41J256M8DA-125:H Micron Technology Inc, MT41J256M8DA-125:H Datasheet - Page 200

• Manufacturer Part Number: MT41J256M8DA-125:H
• Manufacturer: Micron Technology Inc

Specifications of MT41J256M8DA-125:H

• Lead Free Status / Rohs Status: Supplier Unconfirmed

DQS, DQS#
Figure 116: ODT During READs
Command
Address
ODT
CK#
R
DQ
CK
TT
READ
Valid
T0
NOP
T1
Note:
NOP
T2
1. ODT must be disabled externally during READs by driving ODT LOW. For example, CL = 6; AL = CL - 1 = 5; RL = AL
NOP
T3
+ CL = 11; CWL = 5; ODTL on = CWL + AL - 2 = 8; ODTL off = CWL + AL - 2 = 8. R
“Don’t Care.”
NOP
T4
ODTL off = CWL + AL - 2
R
TT,nom
RL = AL + CL
NOP
T5
NOP
T6
NOP
T7
NOP
T8
NOP
T9
t AOF (MIN)
t AOF (MAX)
NOP
T10
ODTL on = CWL + AL - 2
NOP
T11
DI
b
b + 1
DI
NOP
T12
b + 2
DI
b + 3
DI
NOP
T13
TT,nom
b + 4
DI
b + 5
DI
is enabled. R
NOP
T14
b + 6
DI
b + 7
DI
Transitioning
NOP
T15
TT(WR)
t AON (MAX)
NOP
T16
R
is a
TT,nom
Don’t Care
NOP
T17