MT41J256M8DA-125:H Micron Technology Inc, MT41J256M8DA-125:H Datasheet - Page 49

• Manufacturer Part Number: MT41J256M8DA-125:H
• Manufacturer: Micron Technology Inc

Specifications of MT41J256M8DA-125:H

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 25: Input Switching Conditions
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
Parameter/Condition
Input high AC voltage: Logic 1 @ 175mV
Input high AC voltage: Logic 1 @ 150mV
Input high AC voltage: Logic 1 @ 135 mV
Input high AC voltage: Logic 1 @ 125 mV
Input high DC voltage: Logic 1 @ 100 mV
Input low DC voltage: Logic 0 @ –100mV
Input low AC voltage: Logic 0 @ –125mV
Input low AC voltage: Logic 0 @ –135mV
Input low AC voltage: Logic 0 @ –150mV
Input low AC voltage: Logic 0 @ –175mV
Input high AC voltage: Logic 1
Input high AC voltage: Logic 1
Input high AC voltage: Logic 1
Input high DC voltage: Logic 1
Input low DC voltage: Logic 0
Input low AC voltage: Logic 0
Input low AC voltage: Logic 0
Input low AC voltage: Logic 0
Notes:
4. V
5. V
1. All voltages are referenced to V
2. Input setup timing parameters (
3. Input hold timing parameters (
4. Single-ended input slew rate = 1 V/ns; maximum input voltage swing under test is
in restrictions outlined in the SELF REFRESH section.
resistors. MIN and MAX values are system-dependent.
slew rates and setup/hold times are specified at the DRAM ball. V
and DM inputs.
900mV (peak-to-peak).
REFDQ(DC)
TT
is not applied directly to the device. V
may transition to V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH(AC175)min
IH(AC150)min
IH(AC135)min
IH(AC125)min
IH(DC100)min
IL(DC100)max
IL(AC125)max
IL(AC130)max
IL(AC150)max
IL(AC175)max
IH(AC175)min
IH(AC150)min
IH(AC135)min
IH(DC100)min
IL(DC100)max
IL(AC135)max
IL(AC150)max
IL(AC175)max
Symbol
Command and Address
DQ and DM
49
DDR3-1066
DDR3-800
REFDQ(sr)
+175
+150
+100
–100
–150
–175
+175
+150
+100
–100
–150
–175
t
IH and
REF
–
–
–
–
–
–
t
IS and
. V
Electrical Specifications – DC and AC
Micron Technology, Inc. reserves the right to change products or specifications without notice.
REF
and back to V
t
t
DH) are referenced at V
DS) are referenced at V
is V
DDR3-1333
DDR3-1600
TT
REFCA
is a system supply for signal termination
2Gb: x4, x8, x16 DDR3 SDRAM
+175
+150
+100
+150
+100
–100
–150
–175
–100
–150
–
–
–
–
–
–
–
–
for control, command, and address. All
REFDQ(DC)
when in SELF REFRESH, with-
DDR3-1866
© 2006 Micron Technology, Inc. All rights reserved.
IL(AC)
IL(DC)
+135
+125
+100
+135
+100
–100
–125
–135
–100
–135
REF
–
–
–
–
–
–
–
–
/V
/V
is V
IH(DC)
IH(AC)
REFDQ
, not V
, not V
for DQ
Units
REF(DC)
REF(DC)
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
.
.