MT41J256M8DA-125:H Micron Technology Inc, MT41J256M8DA-125:H Datasheet - Page 201

• Manufacturer Part Number: MT41J256M8DA-125:H
• Manufacturer: Micron Technology Inc

Specifications of MT41J256M8DA-125:H

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Asynchronous ODT Mode
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
Asynchronous ODT mode is available when the DRAM runs in DLL on mode and when
either R
charged power-down standby (via MR0[12]). Additionally, ODT operates asynchronous-
ly when the DLL is synchronizing after being reset. See Power-Down Mode (page 179)
for definition and guidance over power-down details.
In asynchronous ODT timing mode, the internal ODT command is not delayed by AL
relative to the external ODT command. In asynchronous ODT mode, ODT controls R
by analog time. The timing parameters
and ODTL off/
The minimum R
nation circuit leaves High-Z and ODT resistance begins to turn on. Maximum R
on time (
(MIN) and
The minimum R
nation circuit starts to turn off ODT resistance. Maximum R
[MAX]) is the point at which ODT has reached High-Z.
(MAX) are measured from ODT being sampled LOW.
TT,nom
t
AONPD [MAX]) is the point at which ODT resistance is fully on.
t
AONPD (MAX) are measured from ODT being sampled HIGH.
or R
t
AOF, respectively, when ODT operates asynchronously.
TT
TT
TT(WR)
turn-on time (
turn-off time (
is enabled; however, the DLL is temporarily turned off in pre-
201
t
t
AONPD [MIN]) is the point at which the device termi-
AOFPD [MIN]) is the point at which the device termi-
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
AONPD and
2Gb: x4, x8, x16 DDR3 SDRAM
t
Asynchronous ODT Mode
AOFPD replace ODTL on/
t
AOFPD (MIN) and
TT
© 2006 Micron Technology, Inc. All rights reserved.
turn-off time (
t
AONPD
t
AOFPD
t
AOFPD
t
TT
AON
turn-
TT