MT48H32M16LFBF-75 IT:B Micron Technology Inc, MT48H32M16LFBF-75 IT:B Datasheet - Page 57

• Manufacturer Part Number: MT48H32M16LFBF-75 IT:B
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48H32M16LFBF-75 IT:B

• Organization: 32Mx16
• Density: 512Mb
• Address Bus: 15b
• Access Time (max): 8/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 90mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant

Figure 27: WRITE-to-WRITE
PDF: 09005aef82ea3742
512mb_mobile_sdram_y47m.pdf – Rev. H 12/09 EN
Note:
Command
Data for any WRITE burst can be truncated with a subsequent READ command, and
data for a fixed-length WRITE burst can be followed immediately by a READ command.
After the READ command is registered, data input is ignored and WRITEs will not be
executed (see Figure 29 (page 58)). Data n + 1 is either the last of a burst of two or the
last desired data element of a longer burst.
Data for a fixed-length WRITE burst can be followed by or truncated with a PRE-
CHARGE command to the same bank, provided that auto precharge was not activated.
A continuous-page WRITE burst can be truncated with a PRECHARGE command to the
same bank. The PRECHARGE command should be issued
which the last desired input data element is registered. The auto precharge mode re-
quires a
In addition, when truncating a WRITE burst at high clock frequencies (
DQM signal must be used to mask input data for the clock edge prior to and the clock
edge coincident with the PRECHARGE command (see Figure 30 (page 59)). Data n + 1
is either the last of a burst of two or the last desired data element of a longer burst. Fol-
lowing the PRECHARGE command, a subsequent command to the same bank cannot
be issued until
In the case of a fixed-length burst being executed to completion, a PRECHARGE com-
mand issued at the optimum time (as described above) provides the same operation
that would result from the same fixed-length burst with auto precharge. The disadvant-
age of the PRECHARGE command is that it requires that the command and address
buses be available at the appropriate time to issue the command. The advantage of the
PRECHARGE command is that it can be used to truncate fixed-length bursts or continu-
ous page bursts.
Address
1. DQM is LOW. Each WRITE command may be issued to any bank.
CLK
DQ
t
WR of at least one clock with time to complete, regardless of frequency.
WRITE
Bank,
Col n
D
T0
IN
t
RP is met.
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
NOP
D
T1
IN
57
Don’t Care
WRITE
Bank,
Col b
D
T2
IN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
WR after the clock edge at
© 2007 Micron Technology, Inc. All rights reserved.
WRITE Operation
t
CK < 15ns), the