MT48H32M16LFBF-75 IT:B Micron Technology Inc, MT48H32M16LFBF-75 IT:B Datasheet - Page 63

MT48H32M16LFBF-75 IT:B

Manufacturer Part Number
MT48H32M16LFBF-75 IT:B
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48H32M16LFBF-75 IT:B

Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
8/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
90mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Figure 34: WRITE – DQM Operation
Burst Read/Single Write
PDF: 09005aef82ea3742
512mb_mobile_sdram_y47m.pdf – Rev. H 12/09 EN
Command
BA0, BA1
Address
DQM
CKE
CLK
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
Bank
T0
Row
Row
t CKH
t CMH
t AH
t AH
t AH
Note:
t RCD
t CK
The burst read/single write mode is entered by programming the write burst mode bit
(M9) in the mode register to a 1. In this mode, all WRITE commands result in the access
of a single column location (burst of one), regardless of the programmed burst length.
READ commands access columns according to the programmed burst length and se-
quence, just as in the normal mode of operation (M9 = 0).
T1
NOP
1. For this example, BL = 4.
Disable auto precharge
Enable auto precharge
t CMS
t CL
t DS
Column m
WRITE
T2
Bank
D
t CMH
IN
t DH
t CH
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
T3
NOP
63
t DS
T4
NOP
Micron Technology, Inc. reserves the right to change products or specifications without notice.
D
IN
t DH
t DS
T5
NOP
D
IN
t DH
© 2007 Micron Technology, Inc. All rights reserved.
NOP
T6
WRITE Operation
NOP
T7
Don’t Care

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