KMC7457VG1267LC Freescale Semiconductor, KMC7457VG1267LC Datasheet - Page 39

• Manufacturer Part Number: KMC7457VG1267LC
• Description: IC MPU RISC 32BIT 1267MHZ 483BGA
• Manufacturer: Freescale Semiconductor

Specifications of KMC7457VG1267LC

• Processor Type: MPC74xx PowerPC 32-Bit
• Speed: 1.267GHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 483-FCCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Freescale Semiconductor
TEA
TEST[0:3]
TEST[4]
TMS
TRST
TS
TSIZ[0:2]
TT[0:4]
WT
V
Notes:
1. OV
2. Unused address pins must be pulled down to GND.
3. These pins require weak pull-up resistors (for example, 4.7 kΩ) to maintain the control signals in the negated state after they
4. This signal selects between MPX bus mode (asserted) and 60x bus mode (negated) and will be sampled at HRESET going
5. This signal must be negated during reset, by pull up to OV
6. Internal pull up on die.
7. Ignored in 60x bus mode.
8. These signals must be pulled down to GND if unused, or if the MPC7447 is in 60x bus mode.
9. These input signals are for factory use only and must be pulled down to GND for normal machine operation.
10.This test signal is recommended to be tied to HRESET; however, other configurations will not adversely affect performance.
11.These signals are for factory use only and must be left unconnected for normal machine operation.
12.These input signals are for factory use only and must be pulled up to OV
13.This pin can externally cause a performance monitor event. Counting of the event is enabled via software.
14.This signal must be asserted during reset, by pull down to GND or assertion by HRESET, to ensure proper operation.
A[0:35]
AACK
AP[0:4]
ARTRY
Signal Name
DD
the PLL (after filtering to become AV
HRESET (selects 2.5 V). If used, the pull-down resistor should be less than 250 Ω. For actual recommended value of V
supply voltages see
have been actively negated and released by the MPC7447 and other bus masters.
high.
proper operation.
Signal Name
DD
supplies power to the processor bus, JTAG, and all control signals; and V
L1
A12, B6, B10, E10
D10
F1
A5
L4
G6, F7, E7
E5, E6, F6, E9, C5
D3
H8, H10, H12, J7, J9, J11, J13, K8, K10, K12, K14, L7,
L9, L11, L13, M8, M10, M12
Table 16. Pinout Listing for the MPC7447, 360 CBGA Package (continued)
Table
E10, N4, E8, N5, C8, R2, A7, M2, A6, M1, A10, U2,
N2, P8, M8, W4, N6, U6, R5, Y4, P1, P4, R6, M7, N7,
AA3, U4, W2, W1, W3, V4, AA1, D10, J4, G10, D9
U1
L5, L6, J1, H2, G5
T2
Table 17. Pinout Listing for the MPC7457, 483 CBGA Package
MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7
4.
DD
Pin Number
). To program the I/O voltage, connect BVSEL to either GND (selects 1.8 V) or to
Pin Number
DD
or negation by ¬HRESET (inverse of HRESET), to ensure
DD
Active
for normal machine operation.
High
High
High
Low
Low
Low
Low
Active
—
—
—
DD
High
High
Low
Low
supplies power to the processor core and
Output
Output
Input
Input
Input
Input
Input
I/O
I/O
I/O
—
Input
I/O
I/O
I/O
I/O
I/F Select
I/F Select
BVSEL
BVSEL
BVSEL
BVSEL
BVSEL
BVSEL
BVSEL
BVSEL
BVSEL
N/A
BVSEL
BVSEL
BVSEL
BVSEL
Pinout Listings
1
1
Notes
6, 14
Notes
12
9
6
3
in
2
3
or
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