KMC7457VG1267LC Freescale Semiconductor, KMC7457VG1267LC Datasheet - Page 63

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KMC7457VG1267LC

Manufacturer Part Number
KMC7457VG1267LC
Description
IC MPU RISC 32BIT 1267MHZ 483BGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of KMC7457VG1267LC

Processor Type
MPC74xx PowerPC 32-Bit
Speed
1.267GHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
483-FCCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Part Number
Manufacturer
Quantity
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Part Number:
KMC7457VG1267LC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
example, assuming a T
consumption (P
Die-junction temperature: T
For this example, a R
the maximum value of
Though the die junction-to-ambient and the heat sink-to-ambient thermal resistances are a common
figure-of-merit used for comparing the thermal performance of various microelectronic packaging
technologies, one should exercise caution when only using this metric in determining thermal management
because no single parameter can adequately describe three-dimensional heat flow. The final die-junction
operating temperature is not only a function of the component-level thermal resistance, but the
system-level design and its operating conditions. In addition to the component's power consumption, a
number of factors affect the final operating die-junction temperature—airflow, board population (local
heat flux of adjacent components), heat sink efficiency, heat sink attach, heat sink placement, next-level
interconnect technology, system air temperature rise, altitude, etc.
Due to the complexity and the many variations of system-level boundary conditions for today's
microelectronic equipment, the combined effects of the heat transfer mechanisms (radiation, convection,
and conduction) may vary widely. For these reasons, we recommend using conjugate heat transfer models
for the board, as well as system-level designs.
For system thermal modeling, the MPC7447 and MPC7457 thermal model is shown in
volumes will be used to represent this device. Two of the volumes, solder ball, and air and substrate, are
modeled using the package outline size of the package. The other two, die, and bump and underfill, have
the same size as the die. The silicon die should be modeled 9.64
applied as a uniform source at the bottom of the volume. The bump and underfill layer is modeled as 9.64
11.0
xy-plane and 2 W/(m • K) in the direction of the z-axis. The substrate volume is 25
(MPC7447) or 29
The solder ball and air layer is modeled with the same horizontal dimensions as the substrate and is 0.9 mm
thick. It can also be modeled as a collapsed volume using orthotropic material properties: 0.034 W/(m •
K) in the xy-plane direction and 3.8 W/(m • K) in the direction of the z-axis.
Freescale Semiconductor
×
0.069 mm (or as a collapsed volume) with orthotropic material properties: 0.6 W/(m • K) in the
d
) of 18.7 W, the following expression for T
×
29
θsa
a
Table
×
value of 2.1°C/W or less is required to maintain the die junction temperature below
MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7
of 30°C, a T
1.2 mm (MPC7457), and this volume has 18 W/(m • K) isotropic conductivity.
4.
j
= 30°C + 5°C + (0.1°C/W + 1.5°C/W + θ
r
of 5°C, a CBGA package R
j
is obtained:
×
θJC
11.0
= 0.1, and a typical power
×
sa
0.74 mm with the heat source
)
×
18.7 W
System Design Information
×
25
Figure
×
1.2 mm
30. Four
63
×

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