MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 27

• Manufacturer Part Number: MC68MH360ZP33L
• Description: IC MPU 32BIT QUICC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

9.4.2.7
9.4.2.8
9.4.2.9
9.4.3
9.4.3.1
9.4.3.2
9.4.4
9.5
9.5.1
9.5.2
9.5.3
9.5.4
9.6
9.6.1
9.6.2
9.6.3
9.6.4
9.6.5
9.6.5.1
9.6.5.2
9.6.5.3
9.6.5.4
9.6.5.5
9.6.5.6
9.6.6
9.6.7
9.6.7.1
9.6.7.2
9.7
9.7.1
9.7.2
9.7.3
9.7.4
9.8
9.8.1
9.8.1.1
9.8.1.2
9.8.1.3
9.8.1.4
9.8.1.5
9.8.1.6
9.8.1.7
9.8.1.8
9.8.1.9
9.8.1.10
Paragraph
Number
MOTOROLA
EEPROM............................................................................................... 9-45
DRAM SIMM ......................................................................................... 9-45
DRAM Devices. ..................................................................................... 9-46
Software Configuration.......................................................................... 9-48
Basic Initialization.................................................................................. 9-49
Configuring the Memory Controller. ...................................................... 9-49
Interfacing Multiple QUICCs to an MC68EC040 ................................... 9-51
Selecting Cache Modes on the MC68EC040........................................ 9-51
The Algorithm ........................................................................................ 9-52
Protection .............................................................................................. 9-52
MC68EC040 Cache Behavior ............................................................... 9-53
Enabling the Caching Modes ................................................................ 9-53
Interfacing the QUICC to the 53C90 scsi controller .............................. 9-54
SCSI General Overview ........................................................................ 9-54
Physical Interface .................................................................................. 9-54
Logical Interface .................................................................................... 9-59
Functional Description........................................................................... 9-61
Hardware Configuration ........................................................................ 9-62
Clocking Strategy. ................................................................................. 9-62
Reset Strategy....................................................................................... 9-62
Read/Write timing.................................................................................. 9-62
Interrupt Handling.................................................................................. 9-62
IDMA1 Setup and Timing. ..................................................................... 9-64
QUICC I/O Ports.................................................................................... 9-65
Active SCSI Terminations ..................................................................... 9-65
Software Configuration.......................................................................... 9-65
Configuring IDMA1. ............................................................................... 9-65
Configuring The Memory Controller. ..................................................... 9-66
Using the QUICC as a TAP Controller for Board Self-Test ................... 9-66
Board Layout ......................................................................................... 9-67
Board Testing ........................................................................................ 9-68
Microcontroller Interface........................................................................ 9-70
Test Pattern Generation ........................................................................ 9-72
Interfacing an MC68EC030 Master to the QUICC In Slave Mode ........ 9-74
MC68EC030 to QUICC Interface .......................................................... 9-74
MC68EC030 Reads and Writes to QUICC............................................ 9-75
Clocking Strategy. ................................................................................. 9-75
Reset Strategy....................................................................................... 9-77
Interrupts ............................................................................................... 9-77
Bus Arbitration....................................................................................... 9-78
Breakpoint Generation .......................................................................... 9-78
Bus Monitor Function ............................................................................ 9-78
Spurious Interrupt Monitor..................................................................... 9-78
Software Watchdog ............................................................................... 9-79
Periodic Interval Timer .......................................................................... 9-79
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
Title
Table of Contents
Number
Page
xxiii