MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 520

• Manufacturer Part Number: MC68MH360ZP33L
• Description: IC MPU 32BIT QUICC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Serial Communication Controllers (SCCs)
is still obtained from the SCC’s individual CTSx pin; thus, the CTS pin must be configured
in port C to connect to the desired SCC. Since the SCC only receives clocks during its time
slot, the CTS pin is only sampled during the transmit clock edges of the SCC’s particular
time slot.
7.10.18.3 HDLC BUS MEMORY MAP AND PROGRAMMING. HDLC bus on the QUICC is
implemented using the HDLC controller with certain bits set. Otherwise, the user should con-
sult the HDLC controller section for detailed information on the programming of HDLC.
7.10.18.3.1 GSMR Programming. The GSMR programming sequence is as follows:
7.10.18.3.2 PSMR Programming. The PSMR programming sequence is as follows:
7.10.18.3.3 HDLC Bus Controller Example. Except for the previously discussed register
programming, the HDLC Example #1 may be followed.
7.10.19 AppleTalk Controller
AppleTalk is a set of protocols developed by Apple Computer Inc. to provide a LAN service
between Macintosh computers and printers. Although AppleTalk can be implemented over
a variety of physical and link layers, including Ethernet, the AppleTalk protocols have tradi-
tionally been most closely associated with one particular physical and link layer protocol
called LocalTalk.
The term LocalTalk refers to an HDLC-based link layer and physical layer protocol that runs
at the rate of 230.4 kbps. In this document, the term AppleTalk controller refers to a support
that the QUICC provides for the LocalTalk protocol.
The AppleTalk controller provides the required frame synchronization, bit sequence, pream-
ble, and postamble onto standard HDLC frames. These capabilities, as well as the use of
the HDLC controller in conjunction with the DPLL operating in FM0 mode, provide the proper
connection formats to the LocalTalk bus.
7-196
1. Set the MODE bits to HDLC.
2. Set the ENT and ENR bits as desired.
3. Set the DIAG bits for normal operation.
4. Set the RDCR and TDCR bits for 1x clock.
5. Set the TENC and RENC bits for NRZ.
6. Clear RTSM.
7. Set CTSS to one and all other bits to zero or to their default condition.
1. Set the NOF bits as desired.
2. Set the CRC to 16-bit CRC CCITT.
3. Set the RTE bit.
4. Set the BUS bit.
5. Set the BRM bit to one or zero as desired.
6. Set all other bits to zero or to their default condition.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
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