MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 603

• Manufacturer Part Number: MC68MH360ZP33L
• Description: IC MPU 32BIT QUICC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Freescale Semiconductor, Inc.
Serial Management Controllers (SMCs)
7.11.7.5 SMC UART RECEPTION PROCESSING. When the CPU32+ core enables the
SMC receiver in UART mode, it will enter hunt mode, waiting for the first character to arrive.
Once the first character arrives, the first Rx BD is checked by the CP to see if it is empty. It
then begins storing characters in the associated data buffer.
When the data buffer has been filled or the MAX_IDL timer has expired (assuming it was
enabled), the SMC clears the E-bit in the BD and generates an interrupt if the I-bit in the BD
is set. If the incoming data exceeds the length of the data buffer, the SMC will fetch the next
BD in the table and, if it is empty, will continue to transfer data to this BD’s associated data
buffer.
If the CM bit is set in the Rx BD, the E-bit will not be cleared, allowing the associated data
buffer to be overwritten automatically when the CP next accesses this data buffer.
7.11.7.6 SMC UART PROGRAMMING MODEL. An SMC configured as a UART uses the
same data structure as in the other modes. The SMC UART data structure supports multi-
buffer operation. The SMC UART allows the user to transmit break and preamble
sequences. Overrun, parity, and framing errors are reported via the BDs. In its simplest
form, the SMC UART can function in a character-oriented environment. Each character is
transmitted with accompanying stop bits and parity (as configured by the user), and received
into separate 1-byte buffers. Reception of each buffer may generate a maskable interrupt.
Many applications may want to take advantage of the message-oriented capabilities sup-
ported by the SMC UART by using linked buffers (in either receive or transmit). In this case,
data is handled in a message-oriented environment; users can work on entire messages
rather than operating on a character-by-character basis. A message may span several
linked buffers. Each message can be both transmitted and received as a linked list of buffers
without any intervention from the CPU32+, which achieves both ease in programming and
significant savings in processor overhead.
In the message-oriented environment, the idle sequence is used as the message delimiter.
The transmitter is able to generate an idle sequence before starting a new message, and
the receiver is able to close a buffer upon detection of idle sequence.
7.11.7.7 SMC UART COMMAND SET. The following transmit and receive commands are
issued to the CR.
7.11.7.7.1 Transmit Commands. The following paragraphs describe the SMC UART
transmit commands.
STOP TRANSMIT Command . The channel STOP TRANSMIT command disables the
transmission of characters on the transmit channel. If this command is received by the SMC
UART controller during message transmission, transmission of that message is aborted.
The SMC UART completes transmission of any data already transferred to its FIFO and shift
register (up to two characters) and then stops transmitting data. The TBPTR is not advanced
when this command is issued.
The SMC UART transmitter will transmit a programmable number of break sequences and
then start to transmit idles. The number of break sequences (which may be zero) should be
MOTOROLA
MC68360 USER’S MANUAL
7-279
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